電學(xué)中的測量技術(shù)涉及范圍非常廣,電流測量在電學(xué)計(jì)量中占有非常重要的位置。如何精確地進(jìn)行電流測量是精密測量的一大難題。傳統(tǒng)的電流檢測電路多采用運(yùn)算放大芯片與片外電流檢測電路相結(jié)合的方式,電路集成度很低,需要較多的接口和資源才能完成對電路的檢測。本文把所有電路部分都集成在一塊芯片上,包括檢測電阻,運(yùn)算放大器電路及模擬轉(zhuǎn)數(shù)字轉(zhuǎn)換電路,從而在電路內(nèi)部可以進(jìn)行電流檢測,使電路更好的集成化。前置電路使用二級共源共柵結(jié)構(gòu)的運(yùn)算放大器,減小溝道長度調(diào)制效應(yīng)造成的電流誤差。10位SAR ADC中采用電容驅(qū)動(dòng)能力強(qiáng)的傳輸門保證了模數(shù)轉(zhuǎn)化器的有效精度。比較器模塊采用再生鎖存器與遲滯比較器作為基礎(chǔ)單元組合解決精密測量的問題。本設(shè)計(jì)可以作為嵌入芯片內(nèi)的一小部分而檢測芯片中的微小電流1mA~100mA,工作電壓在1.8v左右,電流檢測精度預(yù)期達(dá)到10uA的需求。The measurement technology in electricity involves a wide range,and current measurement plays a very important position in electrical measurement.How to accurately measure current is a big problem in precision measurement. The traditional current detecting circuit adopts the combination of the operational amplifier chip and theoff-chip current detecting circuit, The circuit integration is very low, and more interfaces and resources are needed tocomplete the circuit detection.This topic integrates all the circuit parts into one chip, including detection resistance, operational amplifier circuit andanalog to digital conversion circuit. Highly integrated circuit makes the external resources on the chip more intensive,so that current detection can be carried out inside the circuit, so that the circuit can be better integrated. Thefront-end circuit of this project uses two-stage cascade operational amplifier and cascade tube to reduce the currenterror caused by channel length modulation effect. In 10-bit SAR ADC, the transmission gate with strong capacitivedriving ability ensures the effective accuracy of the analog-to-digital converter. Comparator module uses regenerativelatch and hysteresis comparator as basic unit to solve the difficult problem of precision measurement. This topic can beused as a small part of the embedded chip to detect the micro-current in the chip 1 mA~100 mA, the working voltageis about 1.8v, and the current detection accuracy is expected to reach the requirement of 10 uA.
標(biāo)簽： 電流檢測 電路 運(yùn)算放大器 adc
上傳時(shí)間： 2022-04-03
上傳用戶：
本文首次設(shè)計(jì)并驗(yàn)證了基于macom三合一芯片設(shè)計(jì)的光模塊電路,該電路旨在提供一種滿足SFF-8472中規(guī)定的數(shù)字診斷功能的低成本SFP+模塊。電路采用激光器驅(qū)動(dòng)、限幅放大器、控制器以及時(shí)鐘恢復(fù)單元集成的單芯片,在保證高精度數(shù)字診斷功能基礎(chǔ)上,實(shí)現(xiàn)了低成本高可靠的特點(diǎn)。該電路在光接收接口組件與激光器驅(qū)動(dòng)和限幅放大器單元的限幅放大器部分之間接入濾波器來提高模塊的靈敏度及信號質(zhì)量。在控制器單元的數(shù)字電位器的引腳上采用外加電阻的方式避免出現(xiàn)上電不發(fā)光的故障問題。該研究結(jié)果為下一代SFP-DD光模塊設(shè)計(jì)與開發(fā)工作,奠定了一定的理論與實(shí)踐基礎(chǔ)。This paper designs and validates the optical module circuit based on the MACOM Trinity chip for the first time.This circuit aims to provide a low-cost SFP module which meets the digital diagnosis function specified in SFF-8472.The circuit uses a single chip integrated with laser driver,limiting amplifier,controller and clock recovery unit.On the basis of ensuring high precision digital diagnosis function,it achieves the characteristics of low cost and high reliability.The circuit connects a filter between the optical receiving interface module and the limiting amplifier part of the laser driver and limiting amplifier unit to improve the sensitivity and signal quality of the module.The pin of the digital potentiometer in the controller unit is equipped with an external resistance to avoid the problem of power failure.The research results lay a theoretical and practical foundation for optical module design in high-speed data center.
上傳時(shí)間： 2022-04-03
上傳用戶：
近年來，隨著個(gè)人數(shù)據(jù)通信的發(fā)展，功能強(qiáng)大的便攜式數(shù)據(jù)終端和多媒體終端得到了廣泛的應(yīng)用。為了實(shí)現(xiàn)用戶在任何時(shí)間、任何地點(diǎn)均能實(shí)現(xiàn)數(shù)據(jù)通信的目標(biāo)，要求傳統(tǒng)的計(jì)算機(jī)網(wǎng)絡(luò)由有線向無線、由固定向移動(dòng)、由單一業(yè)務(wù)向多媒體發(fā)展，這一要求促進(jìn)了無線局域網(wǎng)技術(shù)的發(fā)展。在互聯(lián)網(wǎng)高速發(fā)展的今天，可以認(rèn)為無線局域網(wǎng)將成為未來的發(fā)展趨勢.本課題采用TSMC 0.18um CMOS工藝實(shí)現(xiàn)用于IEEE 802.1la協(xié)議的5GHz無線局域網(wǎng)接收機(jī)射頻前端集成電路一包括低噪聲放大器（Low-Noise Amplifier，LNA）和下變頻器電路（Downconverter），低噪聲放大器是射頻接收機(jī)前端的主要部分，其作用是在盡可能少引入噪聲的條件下對天線接收到的微弱信號進(jìn)行放大。下變須器是接收機(jī)的重要組成部分，它將低噪聲放大器的輸出射頻信號與本振信號進(jìn)行混頻，產(chǎn)生中頻信號。論文對射頻前端集成電路的原理進(jìn)行了分析，比較了不同電路結(jié)構(gòu)的性能，給出了射頻前端集成電路的電路設(shè)計(jì)、版圖設(shè)計(jì)、仿真結(jié)果和測試方案，仿真結(jié)果表明，此次設(shè)計(jì)的射頻前端集成電路具有低噪聲、低功耗的特點(diǎn)，其它性能也完全滿足設(shè)計(jì)指標(biāo)要求
標(biāo)簽： 無線局域網(wǎng) 接收機(jī)
上傳時(shí)間： 2022-06-20
上傳用戶：
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