設(shè)計(jì)一種應(yīng)用于某全地形ATV車(chē)載武器裝置中的中控系統(tǒng)，該系統(tǒng)設(shè)計(jì)是以TMS320F2812型DSP為核心，采用模塊化設(shè)計(jì)思想，對(duì)其硬件部分進(jìn)行系統(tǒng)設(shè)計(jì)，能夠完成對(duì)武器裝置高低、回轉(zhuǎn)方向的運(yùn)動(dòng)控制，實(shí)現(xiàn)靜止或行進(jìn)狀態(tài)中對(duì)目標(biāo)物的測(cè)距，自動(dòng)瞄準(zhǔn)以及按既定發(fā)射模式發(fā)射彈丸和各項(xiàng)安全性能檢測(cè)等功能。通過(guò)編制相應(yīng)的軟件，對(duì)其進(jìn)行系統(tǒng)調(diào)試，驗(yàn)證了該設(shè)計(jì)運(yùn)行穩(wěn)定。 Abstract: A central control system APPLIED to an ATV vehicle weapons is designed. The system design is based on TMS320F2812 DSP as the core， uses modular design for its hardware parts. The central control system can complete the motion control of the level of weapons and equipment， rotation direction， to achieve a state of static or moving objects on the target ranging， auto-targeting and according to the established target and the projectile and the launch of the security performance testing and other functions. Through the development of appropriate software and to carry out system testing to verify the stability of this design and operation.
標(biāo)簽： ATV-ATT DSP 中控系統(tǒng)
上傳時(shí)間： 2013-11-02
上傳用戶(hù)：jshailingzzh
機(jī)電類(lèi)比法是一種把機(jī)械量通過(guò)一定的計(jì)算等效類(lèi)比為電量的方法，其在對(duì)電子機(jī)械系統(tǒng)的分析中應(yīng)用非常廣泛。它能夠把一個(gè)較復(fù)雜的機(jī)械系統(tǒng)類(lèi)比為我們熟知的電路系統(tǒng)來(lái)進(jìn)行分析，從而使問(wèn)題的分析得到簡(jiǎn)化。本文通過(guò)對(duì)振弦式傳感器的分析介紹了機(jī)電類(lèi)比法，并對(duì)使用電路進(jìn)行了相關(guān)的分析。 Summary：The electromechanical analogy is assort of analysis which is to analogize the mechanical system by using circuit system , it APPLIED widely in the filed of analysis the electronic-mechanical system. The analysis can take a complex mechanical system analogous to a circuitry that we well-known, which can simplify the problems. In the paper, the electro-mechanical analogy method is briefly introduced by analysis the vibrating wire sensor，and have a correlation analysis about the circuit we used.關(guān)鍵詞： 機(jī)電類(lèi)比法 振弦式傳感器 頻率 振蕩 反饋Keyword：electro-mechanical analogy method，vibrating wire sensor，frequency, oscillation, feedback 0 引言振弦式傳感器是屬于頻率式傳感器的一種。所謂頻率式傳感器就是能直接將被測(cè)量轉(zhuǎn)換為振動(dòng)頻率信號(hào)的傳感器，這類(lèi)傳感器一般是通過(guò)測(cè)量振弦、振筒、振梁、振膜等彈性振體或石英晶體諧振器的固有諧振頻率來(lái)達(dá)到測(cè)量引起諧振頻率變化的被測(cè)非電量的目的，其也稱(chēng)為諧振式傳感器[1]。在分析該類(lèi)傳感器中，由于其涉及到頻率，就容易讓人聯(lián)想到在電子技術(shù)中接觸到的RLC振蕩電路。因此可以嘗試著用類(lèi)比的方法使之對(duì)應(yīng)起來(lái)分析,即機(jī)電類(lèi)比法分析。
標(biāo)簽： 機(jī)電 傳感器 分 類(lèi)比法
上傳時(shí)間： 2013-11-16
上傳用戶(hù)：paladin
We offer a broad line of high performance low dropout (LDO) linear regulators with fasttransient response, excellent line and load regulation, and very wide input voltage rangefrom 0.9V to 100V. Output currents range from 20mA to 10A, with positive, negative andmultiple output versions available. Many devices offer output voltage operation <0.8V andsome feature operation as low as 0V, even with a single supply. Most are stable with ceramicoutput capacitors. LDO regulators can be APPLIED in virtually any application.
標(biāo)簽： LDO 線(xiàn)性 低壓差 穩(wěn)壓器
上傳時(shí)間： 2013-11-15
上傳用戶(hù)：努力努力再努力
This book is about the digital logic design of microprocessors. It is intended to provide both an understanding of the basic principles of digital logic design, and how these fundamental principles are APPLIED in the building of complex microprocessor circuits using current technologies.
上傳時(shí)間： 2013-10-14
上傳用戶(hù)：leyesome
Applying power to a standard logic chip, SRAM, or EPROM, usually results in output pinstracking the APPLIED voltage as it rises. Programmable logic attempts to emulate that behavior,but physics forbids perfect emulation, due to the device programmability. It requires care tospecify the pin behavior, because programmable parts encounter unknown variables – yourdesign and your power environment.
標(biāo)簽： Xilinx XAPP CPLD 440
上傳時(shí)間： 2013-11-24
上傳用戶(hù)：253189838
This Application Note covers the basics of how to use Verilog as APPLIED to ComplexProgrammable Logic Devices. Various combinational logic circuit examples, such asmultiplexers, decoders, encoders, comparators and adders are provided. Synchronous logiccircuit examples, such as counters and state machines are also provided.
標(biāo)簽： Verilog XAPP CPLD 143
上傳時(shí)間： 2013-11-11
上傳用戶(hù)：y13567890
This introduction covers the fundamentals of VHDL as APPLIED to Complex ProgrammableLogic Devices (CPLDs). Specifically included are those design practices that translate soundlyto CPLDs, permitting designers to use the best features of this powerful language to extractoptimum performance for CPLD designs.
上傳時(shí)間： 2013-11-21
上傳用戶(hù)：gtf1207
This document was developed under the Standard Hardware and Reliability Program (SHARP) TechnologyIndependent Representation of Electronic Products (TIREP) project. It is intended for use by VHSIC HardwareDescription Language (VHDL) design engineers and is offered as guidance for the development of VHDL modelswhich are compliant with the VHDL Data Item Description (DID DI-EGDS-80811) and which can be providedto manufacturing engineering personnel for the development of production data and the subsequent productionof hardware. Most VHDL modeling performed to date has been concentrated at either the component level orat the conceptual system level. The assembly and sub-assembly levels have been largely disregarded. Under theSHARP TIREP project, an attempt has been made to help close this gap. The TIREP models are based upon lowcomplexity Standard Electronic Modules (SEM) of the format A configuration. Although these modules are quitesimple, it is felt that the lessons learned offer guidance which can readily be APPLIED to a wide range of assemblytypes and complexities.
標(biāo)簽： Modelling Guide Navy VHDL
上傳時(shí)間： 2013-11-20
上傳用戶(hù)：pzw421125
Addressbook using double-linked list. This example shows the use of a double-linked list by implementing an addressbook for the console. It has features like inserting, searching(linear), sorting(bubble sort), deleting and load/save to a file. I wrote this during my study of APPLIED Computer Science so it s intended mainly for students who want to know about some advanced programming techniques in C. The Code was compiled with MSVC++ 6.0 but it should compile with any ANSI-compliant compiler.
標(biāo)簽： double-linked list Addressbook implemen
上傳時(shí)間： 2014-01-24
上傳用戶(hù)：asddsd
YSS915 (KP2V2) is an LSI for processing Karaoke voice signals. This LSI has an A/D converter (1 channel) for the microphone echo, and a memory for the microphone echo and key control. These features allow achieving the functions needed for the Karaoke system by using only one LSI chip. As for the microphone echoes, many other types of echoes are available in addition to ordinary ones so that YSS915 is applicable to various uses. In addition to these Karaoke programs, YSS915 is able to provide the Movie & Music programs, with which the surround effect is APPLIED to the movie and music sources for giving the users more enjoyment. YSS915 is pin compatible with and register compatible with YSS903 (KP2V).
標(biāo)簽： processing LSI converter Karaoke
上傳時(shí)間： 2015-06-23
上傳用戶(hù)：lijianyu172
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