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電學中的測量技術涉及范圍非常廣,電流測量在電學計量中占有非常重要的位置。如何精確地進行電流測量是精密測量的一大難題。傳統的電流檢測電路多采用運算放大芯片與片外電流檢測電路相結合的方式,電路集成度很低,需要較多的接口和資源才能完成對電路的檢測。本文把所有電路部分都集成在一塊芯片上,包括檢測電阻,運算放大器電路及模擬轉數字轉換電路,從而在電路內部可以進行電流檢測,使電路更好的集成化。前置電路使用二級共源共柵結構的運算放大器,減小溝道長度調制效應造成的電流誤差。10位SAR ADC中采用電容驅動能力強的傳輸門保證了模數轉化器的有效精度。比較器模塊采用再生鎖存器與遲滯比較器作為基礎單元組合解決精密測量的問題。本設計可以作為嵌入芯片內的一小部分而檢測芯片中的微小電流1mA~100mA,工作電壓在1.8v左右,電流檢測精度預期達到10uA的需求。The measurement technology in electricity involves a wide range,and current measurement plays a very important position in electrical measurement.How to accurately measure current is a big problem in precision measurement. The traditional current detecting circuit adopts the combination of the operational amplifier chip and theoff-chip current detecting circuit, The circuit integration is very low, and more interfaces and resources are needed tocomplete the circuit detection.This topic integrates all the circuit parts into one chip, including detection resistance, operational amplifier circuit andanalog to digital conversion circuit. Highly integrated circuit makes the external resources on the chip more intensive,so that current detection can be carried out inside the circuit, so that the circuit can be better integrated. Thefront-end circuit of this project uses two-stage cascade operational amplifier and cascade tube to reduce the currenterror caused by channel length modulation effect. In 10-bit SAR ADC, the transmission gate with strong capacitivedriving ability ensures the effective accuracy of the analog-to-digital converter. Comparator module uses regenerativelatch and hysteresis comparator as basic unit to solve the difficult problem of precision measurement. This topic can beused as a small part of the embedded chip to detect the micro-current in the chip 1 mA~100 mA, the working voltageis about 1.8v, and the current detection accuracy is expected to reach the requirement of 10 uA.
上傳時間： 2022-04-03
上傳用戶：
本文首次設計并驗證了基于macom三合一芯片設計的光模塊電路,該電路旨在提供一種滿足SFF-8472中規定的數字診斷功能的低成本SFP+模塊。電路采用激光器驅動、限幅放大器、控制器以及時鐘恢復單元集成的單芯片,在保證高精度數字診斷功能基礎上,實現了低成本高可靠的特點。該電路在光接收接口組件與激光器驅動和限幅放大器單元的限幅放大器部分之間接入濾波器來提高模塊的靈敏度及信號質量。在控制器單元的數字電位器的引腳上采用外加電阻的方式避免出現上電不發光的故障問題。該研究結果為下一代SFP-DD光模塊設計與開發工作,奠定了一定的理論與實踐基礎。This paper designs and validates the optical module circuit based on the MACOM Trinity chip for the first time.This circuit aims to provide a low-cost SFP module which meets the digital diagnosis function specified in SFF-8472.The circuit uses a single chip integrated with laser driver,limiting amplifier,controller and clock recovery unit.On the basis of ensuring high precision digital diagnosis function,it achieves the characteristics of low cost and high reliability.The circuit connects a filter between the optical receiving interface module and the limiting amplifier part of the laser driver and limiting amplifier unit to improve the sensitivity and signal quality of the module.The pin of the digital potentiometer in the controller unit is equipped with an external resistance to avoid the problem of power failure.The research results lay a theoretical and practical foundation for optical module design in high-speed data center.
上傳時間： 2022-04-03
上傳用戶：
近年來，隨著個人數據通信的發展，功能強大的便攜式數據終端和多媒體終端得到了廣泛的應用。為了實現用戶在任何時間、任何地點均能實現數據通信的目標，要求傳統的計算機網絡由有線向無線、由固定向移動、由單一業務向多媒體發展，這一要求促進了無線局域網技術的發展。在互聯網高速發展的今天，可以認為無線局域網將成為未來的發展趨勢.本課題采用TSMC 0.18um CMOS工藝實現用于IEEE 802.1la協議的5GHz無線局域網接收機射頻前端集成電路一包括低噪聲放大器（Low-Noise Amplifier，LNA）和下變頻器電路（Downconverter），低噪聲放大器是射頻接收機前端的主要部分，其作用是在盡可能少引入噪聲的條件下對天線接收到的微弱信號進行放大。下變須器是接收機的重要組成部分，它將低噪聲放大器的輸出射頻信號與本振信號進行混頻，產生中頻信號。論文對射頻前端集成電路的原理進行了分析，比較了不同電路結構的性能，給出了射頻前端集成電路的電路設計、版圖設計、仿真結果和測試方案，仿真結果表明，此次設計的射頻前端集成電路具有低噪聲、低功耗的特點，其它性能也完全滿足設計指標要求
上傳時間： 2022-06-20
上傳用戶：
