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The LPC4350/30/20/10 are ARM Cortex-M4 based microcontrollers for embeddedapplications. The ARM Cortex-M4 is a next generation core that offers systemenhancements such as low power consumption, enhanced debug features, and a highlevel of support block integration.The LPC4350/30/20/10 operate at CPU frequencies of up to 150 MHz. The ARMCortex-M4 CPU incorporates a 3-stage pipeline, uses a Harvard architecture withseparate local instruction and data buses as well as a third bus for peripherals, andincludes an internal prefetch unit that supports speculative branching. The ARMCortex-M4 supports single-cycle digital signal processing and SIMD instructions. Ahardware floating-point processor is integrated in the core.The LPC4350/30/20/10 include an ARM Cortex-M0 coprocessor, up to 264 kB of datamemory, advanced configurable peripherals such as the State Configurable Timer (SCT)and the Serial General Purpose I/O (SGPIO) interface, two High-speed USB controllers,Ethernet, LCD, an external memory controller, and multiple digital and analog peripherals
標簽：
4300
LPC
ARM
雙核微控制器
上傳時間：
2013-10-28
上傳用戶：15501536189
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The NXP LPC315x combine an 180 MHz ARM926EJ-S CPU core, High-speed USB 2.0OTG, 192 KB SRAM, NAND flash controller, flexible external bus interface, an integratedaudio codec, Li-ion charger, Real-Time Clock (RTC), and a myriad of serial and parallelinterfaces in a single chip targeted at consumer, industrial, medical, and communicationmarkets. To optimize system power consumption, the LPC315x have multiple powerdomains and a very flexible Clock Generation Unit (CGU) that provides dynamic clockgating and scaling.The LPC315x is implemented as multi-chip module with two side-by-side dies, one fordigital fuctions and one for analog functions, which include a Power Supply Unit (PSU),audio codec, RTC, and Li-ion battery charger.
標簽：
315x
LPC
315
ARM
上傳時間：
2014-01-17
上傳用戶：Altman
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The SDI standards are the predominant standards for uncompressed digital videointerfaces in the broadcast studio and video production center. The first SDI standard,SD-SDI, allowed standard-definition digital video to be transported over the coaxial cableinfrastructure initially installed in studios to carry analog video. Next, HD-SDI wasto support high-definition video. Finally, dual link HD-SDI and 3G-SDIdoubled the bandwidth of HD-SDI to support 1080p (50 Hz and 60 Hz) and other videoformats requiring more bandwidth than HD-SDI provides.
標簽：
FPGA
328
WP
語音
上傳時間：
2013-12-08
上傳用戶：liansi
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In this paper, we discuss efficient coding and design styles using verilog. This can beimmensely helpful for any digital designer initiating designs. Here, we address different problems rangingfrom RTL-Gate Level simulation mismatch to race conditions in writing behavioral models. All theseproblems are accompanied by an example to have a better idea, and these can be taken care off if thesecoding guidelines are followed. Discussion of all the techniques is beyond the scope of this paper, however,here we try to cover a few of them.
標簽：
Efficient
Verilog
Digital
Coding
上傳時間：
2013-11-23
上傳用戶：我干你啊
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This example demonstrates how to erase, write, and read the on-chip 640-byte EEPROM Data Memory of the Analog Devices ADuC812, ADuC814, ADuC816, and ADuC824 devivces. This example includes a µ Vision2 Project with a target for each supported device.
標簽：
demonstrates
example
on-chip
EEPROM
上傳時間：
2015-05-04
上傳用戶：wl9454
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This example program shows how to configure and use the A/D Converter of the following microcontroller:
STMicroelectronics ST10F166
After configuring the A/D, the program reads the A/D result and outputs the converted value using the serial port.
To run this program...
Build the project (Project Menu, Build Target)
Start the debugger (Debug Menu, Start/Stop Debug Session)
View the Serial Window (View Menu, Serial Window #1)
View the A/D converter peripheral (Peripheral Menu, A/D Converter)
Run the program (Debug Menu, Go)
A debug script (debug.ini) creates buttons that set different analog values in A/D channels. As the program runs, you will see the A/D input and output change.
Other buttons create signals that generate sine wave or sawtooth patterns as analog inputs. µ Vision3 users may enable the built-in Logic Analyzer to view, measure and compare these input signals graphically.
標簽：
microcontroll
Converter
configure
following
上傳時間：
2014-12-01
上傳用戶：獨孤求源
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The project KEIL_IODemo shows how to use memory allocation routines (malloc) and char I/O (printf, scanf) via a serial interface with the Keil ARM toolchain.
The I/O functions are adapted for the Analog Devices ADuC7000 series using the SERIAL.C module.
The example also shows the efficiency of the Keil CA ARM Compiler run-time library which is tuned for single chip systems.
標簽：
KEIL_IODemo
allocation
routines
project
上傳時間：
2013-12-08
上傳用戶：ve3344
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UART I/O and Memory Allocation Example for GNU
The project GNU_IODemo shows how to use memory allocation routines (malloc) and char I/O (printf, scanf) via a serial interface with the GNU toolchain.
The I/O functions are adapted for the Analog Devices ADuC7000 series using the SERIAL.C module.
The example also shows the efficiency of the Keil CA ARM Compiler run-time library which is tuned for single chip systems.
標簽：
Allocation
GNU_IODemo
Example
project
上傳時間：
2015-05-04
上傳用戶：Amygdala
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ITU-T Recommendation V.90 98年9月版本
A DIGITAL MODEM AND ANALOGUE MODEM PAIR FOR USE ON THE PUBLIC SWITCHED TELEPHONE NETWORK (PSTN) AT DATA SIGNALLING RATES OF UP TO 56 000 bit/s DOWNSTREAM AND UP TO 33 600 bit/s UPSTREAM
標簽：
MODEM
Recommendation
ANALOGUE
DIGITAL
上傳時間：
2014-01-17
上傳用戶：hn891122
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dvbsnoop is a DVB/MPEG stream analyzer program.
The program can be used to sniff, monitor, debug, dump
or view DVB/MPEG/DSM-CC/MHP stream information (digital
television or data broadcasts) sent via satellite, cable
or terrestrial.
標簽：
program
dvbsnoop
analyzer
monitor
上傳時間：
2013-12-14
上傳用戶：zhangyi99104144
