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Analysis-Numerical

  • 基于ISA總線的計算機與DSP的通信

    在開放式數(shù)控系統(tǒng)結(jié)構(gòu)模型的基礎(chǔ)上,研究了基于ISA總線的DSP通信控制原理。采用中斷方式完成了PC機和DSP之間的通信。介紹了以DriverWorks為工具開發(fā)ISA設(shè)備WDM驅(qū)動程序的方法,探討了中斷處理、驅(qū)動程序與應(yīng)用程序之間的通信,簡要說明了驅(qū)動程序的安裝與調(diào)試。通過調(diào)試,系統(tǒng)設(shè)計運行穩(wěn)定。 Abstract:  The ISA bus and DSP correspondence control principle is investigated in the basis of the existing open architecture numerical control system.The interrupt method is used to realize the communication between PC and DSP based on the ISA bus.The methods of WDM driver exploitation for ISA device using Driver Works are introduced.The main process of driver program and the keys such as handle interrupt and the communication between the drivers and application are presented.And how to debug and install the drive is explained.

    標(biāo)簽: ISA DSP 總線 計算機

    上傳時間: 2013-11-04

    上傳用戶:kang1923

  • 基于DAC7512的數(shù)控直流恒流源設(shè)計

    為了解決磁放大器性能測試過程中,需要對其供給不同數(shù)值恒定電流的問題,設(shè)計了一種基于DAC7512和單片機的數(shù)控恒流源系統(tǒng)。該系統(tǒng)采用AT89C51作為主控器件,將計算機發(fā)送的電流控制字命令轉(zhuǎn)換為D/A轉(zhuǎn)換器控制字,通過模擬SPI通信接口,寫D/A控制字到DAC7512,從而控制其輸出相應(yīng)數(shù)字電壓值,經(jīng)差動縮放電路、電壓/電路變換電路和功率驅(qū)動電路,最后輸出恒定電流。實驗結(jié)果表明,恒流源輸出電流調(diào)節(jié)范圍為-45~+45 mA、精度為±0.1 mA,分辨率達0.024 4 mA,具有應(yīng)用靈活,外圍電路簡單,可靠性高的特點。該數(shù)控直流恒流源也可為相關(guān)產(chǎn)品的測試系統(tǒng)研發(fā)提供參考。 Abstract:  In order to solve the need to supply different values constant current for the magnetic amplifier in testing process, numerical control constant current source system was designed based on DAC7512 chip and microcontroller technology. The system used the AT89C51 as the main chip, which can convert the current control word from computer into to D/A control words. And the system wrote D/A control word into the DAC7512 chip to control the output voltage value by the SPI communication interface, which can output corresponding constant current figures by scaling circuit, the V/I converter and power drive circuit. Experimental results show that the current source output current adjustment range is -45~+45mA, accuracy is ± 0.1mA, and resolution ratio is 0.024 4mA

    標(biāo)簽: 7512 DAC 數(shù)控直流 恒流源

    上傳時間: 2014-12-27

    上傳用戶:invtnewer

  • LS7266R1在電子式萬能材料試驗機中的應(yīng)用

    針對材料試驗機等設(shè)備中要求測量或控制材料拉伸或壓縮的位移,一般采用光電軸角編碼器檢測位置信號,輸出正交編碼脈沖信號。若采用其他方法檢測位置信號,必然導(dǎo)致電路設(shè)計復(fù)雜,可靠性降低。因此,提出一種基于LS7266R1的電子式萬能材料試驗機設(shè)計方案。給出了試驗機中的控制器工作原理,LS7266R1與單片機的接口硬件設(shè)計,以及主程序軟件流程圖。巧妙地把力量傳感器,位移傳感器等機械運動狀態(tài)的壓力或拉力以及位置坐標(biāo),變成了電壓信號和電脈沖數(shù)字信號,供A/D測量和LS7266R1計數(shù),從而實現(xiàn)了獨立完成材料試驗控制或通過PC機串口命令完成材料試驗控制。 Abstract:  Aiming at the requirement that the displacement of the tension and compression always be tested and controlled in the equipement such as material testing machine. The position signal was tested by photoelectric axial angle coder. Therefore, the paper proposes the design of electronic universal testing machine design based on LS7266R1. If the position signal detected by other methods, will inevitably lead to the circuit design complexity, reliability decreased. The work theory of the controller, the hardware interface design between LS7266R1 and single chip, and the flow chart of main program, are presented in this paper. The signal of the compression or tension power and displacement at working, which tested by power sensor and displacement sensor especially, is changed into electric voltage and electric pulse numerical signals. And these signals can be tested by A/D and counted by LS7266R1. Finally the test of the material properties can be controlled by itself, or controlled by the COM command of PC.

    標(biāo)簽: 7266R 7266 LS R1

    上傳時間: 2013-11-02

    上傳用戶:yl1140vista

  • Virtex-5, Spartan-DSP FPGAs Ap

    Virtex-5, Spartan-DSP FPGAs Application Note This application note demonstrates how efficient implementations of Digital Up Converters(DUC) and Digital Down Converters (DDC) can be done by leveraging the Xilinx DSP IPportfolio for increased productivity and reduced time to development. Step-by-step instruction is given on how to perform system-level trade off analysis and develop the most efficient FPGA implementation, thus allowing engineers a flexible, low-cost and low-power alternative to ASSP technologies.

    標(biāo)簽: Spartan-DSP Virtex FPGAs Ap

    上傳時間: 2013-10-23

    上傳用戶:raron1989

  • 開放式匯編器系統(tǒng)的設(shè)計

    匯編器在微處理器的驗證和應(yīng)用中舉足輕重,如何設(shè)計通用的匯編器一直是研究的熱點之一。本文提出了一種開放式的匯編器系統(tǒng)設(shè)計思想,在匯編語言與機器語言間插入中間代碼CMDL(code mapping description language)語言,打破匯編語言與機器語言的直接映射關(guān)系,由此建立起一套描述匯編語言與機器語言的開放式映射體系。基于此開放式映射體系開發(fā)了一套匯編器系統(tǒng),具有較高層次上的通用性和可移植性。【關(guān)鍵詞】指令集,CMDL,匯編器,開放式 Design of Retargetable Assembler System Liu Ling Feng Wen Nan Wang Ying Chun Jiang An Ping Ji Li Jiu IME of Peking University, 100871【摘要】An assembler plays a very important role in the field of microprocessor verifications and applications, thus how to build a retargetable assembler system has been a hotspot in this field for long time. This paper presents a new method about the retargetable assembler system design.It provides a kind of language CMDL, code mapping description language. During the process of assembling, assembler languages are firstly translated to CMDL, and then mapped to the machine codes. In an other word, CMDL is inserted between assembler languages and machine codes during the translation procedure. As a medium code, CMDL has a lot of features, such as high extraction, strong descript capabilities. It can describe almost all attributes of assembler languages. By breaking the direct mapping relationship between assembler languages and machine codes, the complexities of machine codes are hided to the users, therefore, the new retargetable assembler system has higher retargetable level by converting the mapping from assembler languages and machine codes to assembler languages and CMDL, and implementationof it becomes easier. Based on the new mapping system structure, a retargetable assemblersystem is developed. It proved the whole system has good retargetability and implantability.【關(guān)鍵詞】instruction set, symbol table, assembler, lexical analysis, retargetability

    標(biāo)簽: 開放式 匯編器

    上傳時間: 2013-10-10

    上傳用戶:meiguiweishi

  • 基于8086 CPU 的單芯片計算機系統(tǒng)的設(shè)計

    本文依據(jù)集成電路設(shè)計方法學(xué),探討了一種基于標(biāo)準(zhǔn)Intel 8086 微處理器的單芯片計算機平臺的架構(gòu)。研究了其與SDRAM,8255 并行接口等外圍IP 的集成,并在對AMBA協(xié)議和8086 CPU分析的基礎(chǔ)上,采用遵從AMBA傳輸協(xié)議的系統(tǒng)總線代替?zhèn)鹘y(tǒng)的8086 CPU三總線結(jié)構(gòu),搭建了基于8086 IP 軟核的單芯片計算機系統(tǒng),并實現(xiàn)了FPGA 功能演示。關(guān)鍵詞:微處理器; SoC;單芯片計算機;AMBA 協(xié)議 Design of 8086 CPU Based Computer-on-a-chip System(School of Electrical Engineering and Automation, Heifei University of Technology, Hefei, 230009,China)Abstract: According to the IC design methodology, this paper discusses the design of one kind of Computer-on-a-chip system architecture, which is based on the standard Intel8086 microprocessor,investigates how to integrate the 8086 CPU and peripheral IP such as, SDRAM controller, 8255 PPI etc. Based on the analysis of the standard Intel8086 microprocessor and AMBA Specification,the Computer-on-a-chip system based on 8086 CPU which uses AMBA bus instead of traditional three-bus structure of 8086 CPU is constructed, and the FPGA hardware emulation is fulfilled.Key words: Microprocessor; SoC; Computer-on-a-chip; AMBA Specification

    標(biāo)簽: 8086 CPU 單芯片 計算機系統(tǒng)

    上傳時間: 2013-12-27

    上傳用戶:kernor

  • 基于DSP的新型柴油發(fā)電機勵磁控制系統(tǒng)研究

    在綜合分析諧波勵磁無刷同步發(fā)電機勵磁控制系統(tǒng)的基礎(chǔ)上,對其勵磁控制策略進行了研究,開發(fā)了一套基于DSP( TMS320F2812) 控制的新型柴油發(fā)電機勵磁控制系統(tǒng),該系統(tǒng)采用參數(shù)自適應(yīng)模糊PID 控制勵磁,選用交流采樣方式實時檢測各信號的瞬時特性,系統(tǒng)仿真結(jié)果以及在1 臺25 kW 工頻柴油發(fā)電機上的試驗結(jié)果證明了該控制器具有較好的電壓調(diào)節(jié)特性,系統(tǒng)穩(wěn)態(tài)和暫態(tài)性能完全滿足發(fā)電機對勵磁系統(tǒng)的要求。關(guān)鍵詞:勵磁調(diào)節(jié);模糊PID 控制;數(shù)字信號處理器;交流采樣 Abstract :According to the general analysis of the excitation cont rol system of the harmonious wave excitation brushless synchronous generator and it s characteristics ,a new type of diesel generator excitation cont rol system based on DSP( TMS320F2812) was designed. An adaptive fuzzy PID cont rol of excitation is used in this system. To detect the t ransient characteristics of the signals in a timely manner ,AC sampling was applied.The system simulation result s and the testing result s f rom a 25 kW diesel generator (50 Hz) can prove that the voltage regulation characteristics of the excitation cont rol system are very well ,and both the steadyOstate performance and the t ransient performance of the generator are also good.Key words :excitation cont rol ;fuzzy PID cont rol ;digital signal processor (DSP) ;AC sampling

    標(biāo)簽: DSP 柴油發(fā)電機 勵磁控制 系統(tǒng)研究

    上傳時間: 2013-10-29

    上傳用戶:fxf126@126.com

  • MATLAB與PSpice數(shù)據(jù)接口技術(shù)

    摘 要 瞬態(tài)仿真領(lǐng)域的許多工作需要獲得可視化數(shù)據(jù), 仿真電路不能將輸出參數(shù)繪制成圖形時研究工作將受到很大影響. 而權(quán)威電路仿真軟件PSpice 在這個方面不盡如人意. 本文提出了一種有效的解決辦法: 通過MATLAB 編程搭建一個PSpice 與MATLAB 的數(shù)據(jù)接口,使PSpice輸出數(shù)據(jù)文件可以導(dǎo)入到MATLAB中繪制圖形. 這令我們能夠很方便地獲得數(shù)據(jù)的規(guī)律以有效地分析仿真結(jié)果, 這項技術(shù)對于教學(xué)和工程實踐都有比較實際的幫助.關(guān)鍵詞: 瞬態(tài)仿真 仿真程序 PSpice MATLAB 可視化數(shù)據(jù)The Data Transfer from Pspice to MATLABWu hao Ning yuanzhong Liang yingAbstract Many works in the area of transient simulation has shown how a emulator such asPSpice can be interfaced to an control analysis package such as MATLAB to get viewdata. Thepaper describes how such interfaces can be made using the MATLAB programming. The platformas a typical platform will solve the problem that PSpice software sometimes can not draw the datato a picture. It can make us find the rule from numerous data very expediently, so we can analyzethe outcome of the simulation. And it also can be used in the field of education.Keywords Transient Simulation Emulator PSpice MATLAB Viewdata1 引言科學(xué)研究和工程應(yīng)用常需要進行電路仿真 PSpice可進行直流 交流 瞬態(tài)等基本電路特性分析 也可進行蒙托卡諾 MC 統(tǒng)計分析 最壞情況 Wcase 分析 優(yōu)化設(shè)計等復(fù)雜電路特性分析 它是國際上仿真電路的權(quán)威軟件 而MATLAB的主要特點有 高效方便的矩陣和數(shù)組運算 編程效率高 結(jié)構(gòu)化面向?qū)ο?方便的繪圖功能 用戶使用方便 工具箱功能強大 兩者各有著重點 兩種軟件結(jié)合應(yīng)用 對研究工作有很重要的意義香港理工大學(xué)Y. S. LEE 等人首先將PSpice和MATLAB結(jié)合 開發(fā)了電力電子電路優(yōu)化用的CAD 程序MATSPICE[6] 將兩者相結(jié)合的關(guān)鍵在于 如何用MATLAB 獲取PSpice的仿真數(shù)據(jù) 對此參考文獻 6 里沒有詳細敘述 本文著重說明用MATLAB 讀取PSpice仿真數(shù)據(jù)的具體方法本論文利用MATLAB對PSpice仿真出的數(shù)據(jù)處理繪制出后者無法得到或是效果不好的仿真圖形 下面就兩者結(jié)合使用的例子 進行具體說明

    標(biāo)簽: MATLAB PSpice 數(shù)據(jù) 接口技術(shù)

    上傳時間: 2013-10-20

    上傳用戶:wuchunzhong

  • AN522: Implementing Bus LVDS

    This application note describes how to implement the Bus LVDS (BLVDS) interface in the supported Altera ® device families for high-performance multipoint applications. This application note also shows the performance analysis of a multipoint application with the Cyclone III BLVDS example.

    標(biāo)簽: Implementing LVDS 522 Bus

    上傳時間: 2013-11-10

    上傳用戶:frank1234

  • 基于FPGA+DSP模式的智能相機設(shè)計

    針對嵌入式機器視覺系統(tǒng)向獨立化、智能化發(fā)展的要求,介紹了一種嵌入式視覺系統(tǒng)--智能相機。基于對智能相機體系結(jié)構(gòu)、組成模塊和圖像采集、傳輸和處理技術(shù)的分析,對國內(nèi)外的幾款智能相機進行比較。綜合技術(shù)發(fā)展現(xiàn)狀,提出基于FPGA+DSP模式的硬件平臺,并提出智能相機的發(fā)展方向。分析結(jié)果表明,該系統(tǒng)設(shè)計可以實現(xiàn)脫離PC運行,完成圖像獲取與分析,并作出相應(yīng)輸出。 Abstract:  This paper introduced an embedded vision system-intelligent camera ,which was for embedded machine vision systems to an independent and intelligent development requirements. Intelligent camera architecture, component modules and image acquisition, transmission and processing technology were analyzed. After comparing integrated technology development of several intelligent cameras at home and abroad, the paper proposed the hardware platform based on FPGA+DSP models and made clear direction of development of intelligent cameras. On the analysis of the design, the results indicate that the system can run from the PC independently to complete the image acquisition and analysis and give a corresponding output.

    標(biāo)簽: FPGA DSP 模式 智能相機

    上傳時間: 2013-10-24

    上傳用戶:bvdragon

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