Lamb problem: The Analytical solution of vertical point source. This is very important for synthetic modeling
標簽： Analytical important synthetic solution
上傳時間： 2013-12-25
上傳用戶：hongmo
層次分析法（AHP） 美國運籌學家A.L.Saaty于本世紀70年代提出的層次分析法（Analytical Hierar-chy Process，簡稱AHP方法)，是一種定性與定量相結合的決策分析方法。它是一種將決策者對復雜系統的決策思維過程模型化、數量化的過程。
標簽： Analytical Hierar-chy Process Saaty
上傳時間： 2013-12-19
上傳用戶：hfmm633
Analytical constant-modulus algorithm, to separate linear combinations of CM sourcesThe algorithm is robust in the presence of noise, and is tested on measured data, collected from an experimental set-up.
標簽： algorithm constant-modulus combinations Analytical
上傳時間： 2016-02-17
上傳用戶：ayfeixiao
A case study on D-AMPS 1900 channels. An exact Analytical expression for the tracking MSE on two-tap FIR channels is presented and utilized.
標簽： Analytical expression channels tracking
上傳時間： 2013-12-01
上傳用戶：edisonfather
Precision 16-bit analog outputs with softwareconfigurableoutput ranges are often needed in industrialprocess control equipment, Analytical and scientificinstruments and automatic test equipment. In the past,designing a universal output module was a daunting taskand the cost and PCB real estate associated with thisfunction were problematic, if not prohibitive.
上傳時間： 2014-12-23
上傳用戶：如果你也聽說
中文版詳情瀏覽：http://www.elecfans.com/emb/fpga/20130715324029.html Xilinx UltraScale:The Next-Generation Architecture for Your Next-Generation Architecture The Xilinx® UltraScale™ architecture delivers unprecedented levels of integration and capability with ASIC-class system- level performance for the most demanding applications. The UltraScale architecture is the industr y's f irst application of leading-edge ASIC architectural enhancements in an All Programmable architecture that scales from 20 nm planar through 16 nm FinFET technologies and beyond, in addition to scaling from monolithic through 3D ICs. Through Analytical co-optimization with the X ilinx V ivado® Design Suite, the UltraScale architecture provides massive routing capacity while intelligently resolving typical bottlenecks in ways never before possible. This design synergy achieves greater than 90% utilization with no performance degradation. Some of the UltraScale architecture breakthroughs include: • Strategic placement (virtually anywhere on the die) of ASIC-like system clocks, reducing clock skew by up to 50% • Latency-producing pipelining is virtually unnecessary in systems with massively parallel bus architecture, increasing system speed and capability • Potential timing-closure problems and interconnect bottlenecks are eliminated, even in systems requiring 90% or more resource utilization • 3D IC integration makes it possible to build larger devices one process generation ahead of the current industr y standard • Greatly increased system performance, including multi-gigabit serial transceivers, I/O, and memor y bandwidth is available within even smaller system power budgets • Greatly enhanced DSP and packet handling The Xilinx UltraScale architecture opens up whole new dimensions for designers of ultra-high-capacity solutions.
標簽： UltraScale Xilinx 架構
上傳時間： 2013-11-13
上傳用戶：瓦力瓦力hong
The main objective of this book is to present all the relevant informationrequired for RF and micro-wave power amplifier design includingwell-known and novel theoretical approaches and practical design techniquesas well as to suggest optimum design approaches effectively combiningAnalytical calculations and computer-aided design. This bookcan also be very useful for lecturing to promote the Analytical way ofthinking with practical verification by making a bridge between theoryand practice of RF and microwave engineering. As it often happens, anew result is the well-forgotten old one. Therefore, the demonstrationof not only new results based on new technologies or circuit schematicsis given, but some sufficiently old ideas or approaches are also introduced,that could be very useful in modern practice or could contributeto appearance of new ideas or schematic techniques.
標簽： Amplifier Microwave Design Power
上傳時間： 2013-12-22
上傳用戶：vodssv
中文版詳情瀏覽：http://www.elecfans.com/emb/fpga/20130715324029.html Xilinx UltraScale:The Next-Generation Architecture for Your Next-Generation Architecture The Xilinx® UltraScale™ architecture delivers unprecedented levels of integration and capability with ASIC-class system- level performance for the most demanding applications. The UltraScale architecture is the industr y's f irst application of leading-edge ASIC architectural enhancements in an All Programmable architecture that scales from 20 nm planar through 16 nm FinFET technologies and beyond, in addition to scaling from monolithic through 3D ICs. Through Analytical co-optimization with the X ilinx V ivado® Design Suite, the UltraScale architecture provides massive routing capacity while intelligently resolving typical bottlenecks in ways never before possible. This design synergy achieves greater than 90% utilization with no performance degradation. Some of the UltraScale architecture breakthroughs include: • Strategic placement (virtually anywhere on the die) of ASIC-like system clocks, reducing clock skew by up to 50% • Latency-producing pipelining is virtually unnecessary in systems with massively parallel bus architecture, increasing system speed and capability • Potential timing-closure problems and interconnect bottlenecks are eliminated, even in systems requiring 90% or more resource utilization • 3D IC integration makes it possible to build larger devices one process generation ahead of the current industr y standard • Greatly increased system performance, including multi-gigabit serial transceivers, I/O, and memor y bandwidth is available within even smaller system power budgets • Greatly enhanced DSP and packet handling The Xilinx UltraScale architecture opens up whole new dimensions for designers of ultra-high-capacity solutions.
標簽： UltraScale Xilinx 架構
上傳時間： 2013-11-21
上傳用戶：wxqman
Beginning with an overview of SQL Server 2000, this book discusses online transaction processing (OLTP) and online Analytical processing (OLAP), features a tour of different SQL Server releases, and offers a guide to installation. The author describes and demonstrates the changes since SQL Server 7.0, thoroughly exploring SQL Server 2000 s capacity as a Web-enabled database server. Readers are then immersed in advanced database administration topics such as performance optimization and debugging techniques.
標簽： transaction processing Beginning discusses
上傳時間： 2013-11-28
上傳用戶：eclipse
We present a particle filter construction for a system that exhibits time-scale separation. The separation of time-scales allows two simplifications that we exploit: i) The use of the averaging principle for the dimensional reduction of the system needed to solve for each particle and ii) the factorization of the transition probability which allows the Rao-Blackwellization of the filtering step. Both simplifications can be implemented using the coarse projective integration framework. The resulting particle filter is faster and has smaller variance than the particle filter based on the original system. The convergence of the new particle filter to the Analytical filter for the original system is proved and some numerical results are provided.
標簽： construction separation time-scale particle
上傳時間： 2016-01-02
上傳用戶：fhzm5658
