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  • PCB設計軟件ExpressPCB 下載

    ExpressPCB 是一款免費的PCB設計軟件,簡單實使。可以畫雙層板。 Our Free PCB software is a snap to learn and use. For the first time, designing circuit boards is simple for the beginner and efficient for the professional.   Our board manufacturing service makes top quality two and four layer PCBs. Use our MiniBoard service and pay only $51 for three boards (plus $8 shipping).

    標簽: ExpressPCB PCB 設計軟件

    上傳時間: 2013-11-15

    上傳用戶:lchjng

  • PCB設計軟件ExpressPCB 下載

    ExpressPCB 是一款免費的PCB設計軟件,簡單實使。可以畫雙層板。 Our Free PCB software is a snap to learn and use. For the first time, designing circuit boards is simple for the beginner and efficient for the professional.   Our board manufacturing service makes top quality two and four layer PCBs. Use our MiniBoard service and pay only $51 for three boards (plus $8 shipping).

    標簽: ExpressPCB PCB 設計軟件

    上傳時間: 2013-10-09

    上傳用戶:1047385479

  • Design Safe Verilog State Machine(Synplicity)

      One of the strengths of Synplify is the Finite State Machine compiler. This is a powerfulfeature that not only has the ability to automatically detect state machines in the sourcecode, and implement them with either sequential, gray, or one-hot encoding. But alsoperform a reachability analysis to determine all the states that could possibly bereached, and optimize away all states and transition logic that can not be reached.Thus, producing a highly optimal final implementation of the state machine.

    標簽: Synplicity Machine Verilog Design

    上傳時間: 2013-10-20

    上傳用戶:蒼山觀海

  • UART 4 UART參考設計,Xilinx提供VHDL代碼

    UART 4 UART參考設計,Xilinx提供VHDL代碼 uart_vhdl This zip file contains the following folders:  \vhdl_source  -- Source VHDL files:      uart.vhd  - top level file      txmit.vhd - transmit portion of uart      rcvr.vhd -  - receive portion of uart \vhdl_testfixture  -- VHDL Testbench files. This files only include the testbench behavior, they         do not instantiate the DUT. This can easily be done in a top-level VHDL          file or a schematic. This folder contains the following files:      txmit_tb.vhd  -- Test bench for txmit.vhd.      rcvr_tf.vhd  -- Test bench for rcvr.vhd.

    標簽: UART Xilinx VHDL 參考設計

    上傳時間: 2013-11-02

    上傳用戶:18862121743

  • 低噪聲電壓基準的噪聲測量

      Frequently, voltage reference stability and noise defi nemeasurement limits in instrumentation systems. In particular,reference noise often sets stable resolution limits.Reference voltages have decreased with the continuingdrop in system power supply voltages, making referencenoise increasingly important. The compressed signalprocessing range mandates a commensurate reductionin reference noise to maintain resolution. Noise ultimatelytranslates into quantization uncertainty in A to D converters,introducing jitter in applications such as scales, inertialnavigation systems, infrared thermography, DVMs andmedical imaging apparatus. A new low voltage reference,the LTC6655, has only 0.3ppm (775nV) noise at 2.5VOUT.Figure 1 lists salient specifi cations in tabular form. Accuracyand temperature coeffi cient are characteristic ofhigh grade, low voltage references. 0.1Hz to 10Hz noise,particularly noteworthy, is unequalled by any low voltageelectronic reference.

    標簽: 低噪聲 電壓基準 噪聲測量

    上傳時間: 2013-10-30

    上傳用戶:wxhwjf

  • Full support for extended regular expressions (those with intersection and complement); Support for

    Full support for extended regular expressions (those with intersection and complement); Support for some kinds of cycles in grammar; DFA-based operation; Unicode support; C++ only, requires a modern compiler; Lexical analyzers can be configured to get symbols from any input class (built-in support for std::istream, std::wistream and FILE *); Designed to work with Whale, but can work standalone or interface to other parsers.

    標簽: intersection expressions complement for

    上傳時間: 2013-12-11

    上傳用戶:zhanditian

  • 工具分類:攻擊程序 運行平臺:Windows 工具大?。?577 Bytes 文件MD5 :28f6d5f4d818438522a3d0dc8a3fa46b 工具來源:securiteam.com /

    工具分類:攻擊程序 運行平臺:Windows 工具大?。?577 Bytes 文件MD5 :28f6d5f4d818438522a3d0dc8a3fa46b 工具來源:securiteam.com // GDI+ buffer overrun exploit by FoToZ // NB: the headers here are only sample headers taken from a .JPG file, // with the FF FE 00 01 inserted in header1. // Sample shellcode is provided // You can put approx. 2500 bytes of shellcode...who needs that much anyway // Tested on an unpatched WinXP SP1

    標簽: 818438522a d818438522 securiteam 818438522

    上傳時間: 2015-01-20

    上傳用戶:Late_Li

  • A windows BMP file is a common image format that Java does not handle. While BMP images are used onl

    A windows BMP file is a common image format that Java does not handle. While BMP images are used only on windows machines, they are reasonably common. Reading these shows how to read complex structures in Java and how to alter they byte order from the big endian order used by Java to the little endian order used by the windows and the intel processor.

    標簽: BMP windows common format

    上傳時間: 2013-12-27

    上傳用戶:gaojiao1999

  • What s inside :README - this fileINSTALL - installation instructionsstlport - main STLport include d

    What s inside :README - this fileINSTALL - installation instructionsstlport - main STLport include directorysrc - source and makefiles for iostreams implementationlib - installation directory for STLport library (if you use STLport iostreams only)test/regression - regression test, using wrapper iostreamstest/eh - exception handling test using STLport iostreamsetc - miscellanous files (ChangeLog, TODO, scripts, etc.)

    標簽: instructionsstlport installation fileINSTALL STLport

    上傳時間: 2014-01-19

    上傳用戶:1159797854

  • EP26_Bulk

    EP26_Bulk,大端點bulk傳輸。包含全部firmware以及詳細的pdf文件說明。

    標簽: Bulk EP 26

    上傳時間: 2015-03-13

    上傳用戶:refent

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