The power of programmability gives industrial automation designers a highly efficient， cost-effective alternative to traditional motor control units （MCUs）。 The parallel-processing power， fast computational speeds， and connectivity versatility of Xilinx® FPGAs can accelerate the implementation of advanced motor control algorithms such as Field Oriented Control （FOC）。
Additionally， Xilinx devices lower costs with greater on-chip integration of system components and shorten latencies with high-performance digital signal processing （DSP） that can tackle compute-intensive functions such as PID Controller， Clark/Park transforms， and Space Vector PWM.
The Xilinx Spartan®-6 FPGA Motor Control Development Kit gives designers an ideal starting point for evaluating time-saving， proven， motor-control reference designs. The kit also shortens the process of developing custom control capabilities， with integrated peripheral functions （Ethernet， PowerLink， and PCI® Express）， a motor-control FPGA mezzanine card （FMC） with built-in Texas Instruments motor drivers and high-precision Delta-Sigma modulators， and prototyping support for evaluating alternative front-end circuitry.
The revolution of automation on factory floors is a key driver for the seemingly insatiable demand for higher productivity， lower total cost of ownership，and high safety. As a result， industrial applications drive an insatiable demand of higher data bandwidth and higher system-level performance.
This white paper describes the trends and challenges seen by designers and how FPGAs enable solutions to meet their stringent design goals.
為了提高直接轉(zhuǎn)矩控制（DTC）系統(tǒng)定子磁鏈估計精度，降低電流、電壓測量的隨機(jī)誤差，提出了一種基于擴(kuò)展卡爾曼濾波（EKF）實現(xiàn)異步電機(jī)轉(zhuǎn)子位置和速度估計的方法。擴(kuò)展卡爾曼濾波器是建立在基于旋轉(zhuǎn)坐標(biāo)系下由定子電流、電壓、轉(zhuǎn)子轉(zhuǎn)速和其它電機(jī)參量所構(gòu)成的電機(jī)模型上，將定子電流、定子磁鏈、轉(zhuǎn)速和轉(zhuǎn)子角位置作為狀態(tài)變量，定子電壓為輸入變量，定子電流為輸出變量，通過對磁鏈和轉(zhuǎn)速的閉環(huán)控制提高定子磁鏈的估計精度，實現(xiàn)了異步電機(jī)的無速度傳感器直接轉(zhuǎn)矩控制策略，仿真結(jié)果驗證了該方法的可行性,提高了直接轉(zhuǎn)矩的控制性能。
Abstract:
In order to improve the Direct Torque Control（DTC） system of stator flux estimation accuracy and reduce the current， voltage measurement of random error， a novel method to estimate the speed and rotor position of asynchronous motor based on extended Kalman filter was introduced. EKF was based on d-p axis motor and other motor parameters （state vector: stator current， stator flux linkage， rotor angular speed and position； input: stator voltage； output: staror current). EKF was designed for stator flux and rotor speed estimation in close-loop control. It can improve the estimated accuracy of stator flux. It is possible to estimate the speed and rotor position and implement asynchronous motor drives without position and speed sensors. The simulation results show it is efficient and improves the control performance.
Delta-sigma ADCs, with their high accuracy and high noiseimmunity, are ideal for directly measuring many typesof sensors. Nevertheless, input sampling currents canoverwhelm high source impedances or low-bandwidth,micropower signal conditioning circuits. The LTC®2484family of delta sigma converters solves this problem bybalancing the input currents, thussimplifying or eliminatingthe need for signal conditioning circuits.
ACPR (adjacent channel power ratio), AltCPR (alternatechannel power ratio), and noise are important performancemetrics for digital communication systems thatuse, for example, WCDMA (wideband code division multipleaccess) modulation. ACPR and AltCPR are bothmeasures of spectral regrowth. The power in the WCDMAcarrier is measured using a 5MHz measurement bandwidth;see Figure 1. In the case of ACPR, the total powerin a 3.84MHz bandwidth centered at 5MHz (the carrierspacing) away from the center of the outermost carrier ismeasured and compared to the carrier power. The resultis expressed in dBc. For AltCPR, the procedure is thesame, except we center the measurement 10MHz awayfrom the center of the outermost carrier.
sheerdns is a master DNS server whose zone records are stored on a One-Record-Per-File bases. Because of this, it is the simplest of any DNS to configure, the easiest to update, and the most efficient for networks that experience a lot of updates (for example master servers for dynamic IP address ranges). You never have to restart it; any updates are available immediately without having to notify the sheerdns process. 來源: http://freshmeat.net/projects/sheerdns/?topic_id=149 sheerdns是一個主DNS服務(wù)器，它的域記錄保存在一個One-Record-Per-File（每文件一個記錄）的庫中。因此，它是最簡單的DNS配制，最容易更新，對于有大量更新的網(wǎng)絡(luò)（如動態(tài)IP地址范圍的主服務(wù)器）來說它是最高效的。你不必重新啟動它，任何更新不用通知對應(yīng)DNS進(jìn)程就可以立即生效。
The ICA/BSS algorithms are pure mathematical formulas, powerful, but rather mechanical procedures: There is not very much left for the user to do after the machinery has been optimally implemented. The successful and efficient use of the ICALAB strongly depends on a priori knowledge, common sense and appropriate use of the preprocessing and postprocessing tools. In other words, it is preprocessing of data and postprocessing of models where expertise is truly ne
Although there has been a lot of AVL tree libraries available now, nearly all of them are meant to work in the random access memory(RAM). Some of them do provide some mechanism for dumping the whole tree into a file and loading it back to the memory in order to make data in that tree persistent. It serves well when there s just small amount of data. When the tree is somewhat bigger, the dumping/loading process could take a lengthy time and makes your mission-critical program less efficient. How about an AVL tree that can directly use the disk for data storage ? If there s something like that, we won t need to read through the whole tree in order to pick up just a little bit imformation(a node), but read only the sectors that are neccssary for locating a certain node and the sectors in which that node lies. This is my initial motivation for writing a storage-media independent AVL Tree. However, as you step forth, you would find that it not only works fine with disks but also fine with memorys, too.
The HD66773, controller driver LSI, displays 132RGB-by-176 dot graphics on TFT displays in 260,000
colors. The HD66773’s bit-operation functions, 18-bit high-speed bus interface, and high-speed RAMwrite
functions enable efficient data transfer and high-speed rewriting of data to the graphic RAM.
