Abstract: Standard PCB design and mounting processes can adversely influence MEMS inertial sensors.This application note contains guidelines for the layout, soldering, and mounting of MEMS inertialsensors in LGA packages in order to reduce stresses and improve functionality.
上傳時(shí)間： 2014-01-15
上傳用戶：sjb555
Abstract: While many questions still surround the creation and deployment of the smart grid, the need for a reliablecommunications infrastructure is indisputable. Developers of the IEEE 1901.2 standard identified difficult channel conditionscharacteristic of low-frequency powerline communications and implemented an orthogonal frequency division multiplexing (OFDM)architecture using advanced modulation and channel-coding techniques. This strategy helped to ensure a robust communicationsnetwork for the smart grid.
標(biāo)簽： 1901.2 OFDM IEEE 正交頻分復(fù)用
上傳時(shí)間： 2013-10-18
上傳用戶：myworkpost
Abstract: This application note illustrates the flexibility of the MAX7060 ASK/FSK transmitter. While the currently available evaluationkit (EV kit) has been optimized for the device's use in a specific frequency band (i.e., 288MHz to 390MHz), this document addresseshow the EV kit circuitry can be modified for improved operation at 433.92MHz, a frequency commonly used in Europe. Twoalternative match and filter configurations are presented: one for optimizing drain efficiency, the other for achieving higher transmitpower. Features and capabilities of earlier Maxim industrial, scientific, and medical radio-frequency (ISM-RF) transmitters areprovided, allowing comparison of the MAX7060 to its predecessors. Several design guidelines and cautions for using the MAX7060are discussed.
標(biāo)簽： ASK_FSK 7060 MAX ISM
上傳時(shí)間： 2013-11-14
上傳用戶：swaylong
Abstract: This application note discusses the development and deployment of 3G cellular femtocell base stations. The technicalchallenges for last-mile residential connectivity and adding system capacity in dense urban environments are discussed, with 3Gfemtocell base stations as a cost-effective solution. Maxim's 3GPP TS25.104-compliant transceiver solution is presented along withcomplete radio reference designs such as RD2550. For more information on the RD2550, see reference design 5364, "FemtocellRadio Reference Designs Using the MAX2550–MAX2553 Transceivers."
標(biāo)簽： Base-Station Applications Single-Chip Transceiver
上傳時(shí)間： 2013-11-05
上傳用戶：超凡大師
In the past decade, the size and complexity of manyFPGA designs exceeds the time and resourcesavailable to most design teams, making the use andreuse of Intellectual Property (IP) imperative.However, integrating numerous IP blocks acquiredfrom both internal and external sources can be adaunting challenge that often extends, rather thanshortens, design time. As today's designs integrateincreasing amounts of functionality, it is vital thatdesigners have access to proven, up-to-date IP fromreliable sources.
上傳時(shí)間： 2013-11-11
上傳用戶：csgcd001
The LogiCORE™ GTP Wizard automates the task of creating HDL wrappers to configure the high-speed serial GTP transceivers in Virtex™-5 LXT and SXT devices. The menu-driven interface allows one or more GTP transceivers to be configured using pre-definedtemplates for popular industry standards, or from scratch, to support a wide variety of custom protocols.The Wizard produces a wrapper, an example design, and a testbench for rapid integration and verification of the serial interface with your custom function Features• Creates customized HDL wrappers to configureVirtex-5 RocketIO™ GTP transceivers• Users can configure Virtex-5 GTP transceivers toconform to industry standard protocols usingpredefined templates, or tailor the templates forcustom protocols• Included protocol templates provide support for thefollowing specifications: Aurora, CPRI, FibreChannel 1x, Gigabit Ethernet, HD-SDI, OBSAI,OC3, OC12, OC48, PCI Express® (PCIe®), SATA,SATA II, and XAUI• Automatically configures analog settings• Each custom wrapper includes example design, testbench; and both implementation and simulation scripts
標(biāo)簽： Transceiver Virtex Wizar GTP
上傳時(shí)間： 2013-10-20
上傳用戶：dave520l
Integrated EMI/Thermal Design forSwitching Power SuppliesWei ZhangThesis submitted to the Faculty of theVirginia Polytechnic Institute and State Universityin partial fulfillment of the requirements for the degree of Integrated EMI/Thermal Design forSwitching Power SuppliesWei Zhang(ABSTRACT)This work presents the modeling and analysis of EMI and thermal performancefor switch power supply by using the CAD tools. The methodology and design guidelinesare developed.By using a boost PFC circuit as an example, an equivalent circuit model is builtfor EMI noise prediction and analysis. The parasitic elements of circuit layout andcomponents are extracted analytically or by using CAD tools. Based on the model, circuitlayout and magnetic component design are modified to minimize circuit EMI. EMI filtercan be designed at an early stage without prototype implementation.In the second part, thermal analyses are conducted for the circuit by using thesoftware Flotherm, which includes the mechanism of conduction, convection andradiation. Thermal models are built for the components. Thermal performance of thecircuit and the temperature profile of components are predicted. Improved thermalmanagement and winding arrangement are investigated to reduce temperature.In the third part, several circuit layouts and inductor design examples are checkedfrom both the EMI and thermal point of view. Insightful information is obtained.
標(biāo)簽： EMI 開關(guān)電源 英文
上傳時(shí)間： 2013-11-16
上傳用戶：萍水相逢
This document provides practical, common guidelines for incorporating PCI Express interconnect layouts onto Printed Circuit Boards (PCB) ranging from 4-layer desktop baseboard designs to 10- layer or more server baseboard designs. Guidelines and constraints in this document are intended for use on both baseboard and add-in card PCB designs. This includes interconnects between PCI Express devices located on the same baseboard (chip-to-chip routing) and interconnects between a PCI Express device located “down” on the baseboard and a device located “up” on an add-in card attached through a connector. This document is intended to cover all major components of the physical interconnect including design guidelines for the PCB traces, vias and AC coupling capacitors, as well as add-in card edge-finger and connector considerations. The intent of the guidelines and examples is to help ensure that good high-speed signal design practices are used and that the timing/jitter and loss/attenuation budgets can also be met from end-to-end across the PCI Express interconnect. However, while general physical guidelines and suggestions are given, they may not necessarily guarantee adequate performance of the interconnect for all layouts and implementations. Therefore, designers should consider modeling and simulation of the interconnect in order to ensure compliance to all applicable specifications. The document is composed of two main sections. The first section provides an overview of general topology and interconnect guidelines. The second section concentrates on physical layout constraints where bulleted items at the beginning of a topic highlight important constraints, while the narrative that follows offers additional insight.
標(biāo)簽： pci PCB 設(shè)計(jì)規(guī)范
上傳時(shí)間： 2014-01-24
上傳用戶：s363994250
在Multisim 10軟件環(huán)境下，設(shè)計(jì)一種由運(yùn)算放大器構(gòu)成的精確可控矩形波信號(hào)發(fā)生器，結(jié)合系統(tǒng)電路原理圖重點(diǎn)闡述了各參數(shù)指標(biāo)的實(shí)現(xiàn)與測(cè)試方法。通過改變RC電路的電容充、放電路徑和時(shí)間常數(shù)實(shí)現(xiàn)了占空比和頻率的調(diào)節(jié)，通過多路開關(guān)投入不同數(shù)值的電容實(shí)現(xiàn)了頻段的調(diào)節(jié)，通過電壓取樣和同相放大電路實(shí)現(xiàn)了輸出電壓幅值的調(diào)節(jié)并提高了電路的帶負(fù)載能力，可作為頻率和幅值可調(diào)的方波信號(hào)發(fā)生器。Multisim 10仿真分析及應(yīng)用電路測(cè)試結(jié)果表明，電路性能指標(biāo)達(dá)到了設(shè)計(jì)要求。 Abstract: Based on Multisim 10， this paper designed a kind of rectangular-wave signal generator which could be controlled exactly composed of operational amplifier， the key point was how to implement and test the parameter indicators based on the circuit diagram. The duty and the frequency were adjusted by changing the time constant and the way of charging and discharging of the capacitor， the width of frequency was adjusted by using different capacitors provided with multiple switch， the amplitude of output voltage was adjusted by sampling voltage and using in-phase amplifier circuit，the ability of driving loads was raised， the circuit can be used as squarewave signal generator whose frequency and amplitude can be adjusted. The final simulation results of Multisim 10 and the tests of applicable circuit show that the performance indicators of the circuit meets the design requirements.
標(biāo)簽： Multisim 矩形波 信號(hào)發(fā)生器 仿真
上傳時(shí)間： 2014-01-21
上傳用戶：shen007yue
The ICA/BSS algorithms are pure mathematical formulas, powerful, but rather mechanical procedures: There is not very much left for the user to do after the machinery has been optimally implemented. The successful and efficient use of the ICALAB strongly depends on a priori knowledge, common sense and appropriate use of the preprocessing and postprocessing tools. In other words, it is preprocessing of data and postprocessing of models where expertise is truly ne
標(biāo)簽： mathematical algorithms mechanical procedures
上傳時(shí)間： 2015-03-31
上傳用戶：silenthink
蟲蟲下載站版權(quán)所有 京ICP備2021023401號(hào)-1
