This application note provides a detailed description of themetastable behavior in PLDs from both circuit and statisticalviewpoints. Additionally, the information on the metastablecharacteristics of Cypress PLDs presented here can help youachieve any desired degree of reliability.
標(biāo)簽： PLD 亞穩(wěn)態(tài)
上傳時(shí)間： 2013-10-23
上傳用戶(hù)：gtzj
This document provides practical, common guidelines for incorporating PCI Express interconnect layouts onto Printed Circuit Boards (PCB) ranging from 4-layer desktop baseboard designs to 10- layer or more server baseboard designs. Guidelines and constraints in this document are intended for use on both baseboard and add-in card PCB designs. This includes interconnects between PCI Express devices located on the same baseboard (chip-to-chip routing) and interconnects between a PCI Express device located “down” on the baseboard and a device located “up” on an add-in card attached through a connector. This document is intended to cover all major components of the physical interconnect including design guidelines for the PCB traces, vias and AC coupling capacitors, as well as add-in card edge-finger and connector considerations. The intent of the guidelines and examples is to help ensure that good high-speed signal design practices are used and that the timing/jitter and loss/attenuation budgets can also be met from end-to-end across the PCI Express interconnect. However, while general physical guidelines and suggestions are given, they may not necessarily guarantee adequate performance of the interconnect for all layouts and implementations. Therefore, designers should consider modeling and simulation of the interconnect in order to ensure compliance to all applicable specifications. The document is composed of two main sections. The first section provides an overview of general topology and interconnect guidelines. The second section concentrates on physical layout constraints where bulleted items at the beginning of a topic highlight important constraints, while the narrative that follows offers additional insight.
標(biāo)簽： pci PCB 設(shè)計(jì)規(guī)范
上傳時(shí)間： 2013-10-15
上傳用戶(hù)：busterman
Abstract: The rapid build out of today's smart grid raises a number of security questions. In this article,we review two recent well-documented security breaches and a report of a security gap. These situationsinclude a 2009 smart-meter hack in Puerto Rico; a 2012 password discovery in grid distributionequipment; and insecure storage of a private key in distribution automation equipment. For each of theseattacks, we examine the breach, the potential threat, and secure silicon methods that, as part of acomplete security strategy, can help thwart the attacks.
標(biāo)簽： 智能電網(wǎng) 安全性
上傳時(shí)間： 2013-10-27
上傳用戶(hù)：tecman
Abstract: We don't expect manufacturers to produce clothes that in one size that fits everyone. In thesame way, one ESD component can't solve all issues—each application has different ESD requirements.Knowing that "one size fits all" cannot apply to power design, the power designer, or the engineering"super hero," must consider all the potential disruptions to a steady flow of power and thenvarious waysto mitigate them. This tutorial describes voltage- and current-limiting devices and risetime reducers tomanage the power. It also points to free and low-cost software tools to help design lowpass filters, checkcapacitor self-resonance, and simulate circuits.
標(biāo)簽： 電源工程師 電路設(shè)計(jì)
上傳時(shí)間： 2013-11-18
上傳用戶(hù)：zhouxuepeng1
現(xiàn)有基于MAX7219芯片的數(shù)碼管驅(qū)動(dòng)電路只適用于小尺寸LED，為擴(kuò)展其使用范圍，在介紹動(dòng)態(tài)顯示芯片MAX7219功能的基礎(chǔ)上，提出了一個(gè)基于該芯片的8位高亮度8英寸數(shù)碼管驅(qū)動(dòng)電路。電路保留了MAX7219芯片的功能強(qiáng)大、編程簡(jiǎn)單等優(yōu)點(diǎn)，通過(guò)74LS273鎖存器和ULN2803達(dá)林頓驅(qū)動(dòng)器，實(shí)現(xiàn)了對(duì)任意大尺寸數(shù)碼管提供較高電壓和電流驅(qū)動(dòng)的靜態(tài)顯示，并亮度可調(diào)。 Abstract: The existing display-driving circuit based on MAX7219 was only applicable to small-size LED. To expand its use, based on the function introduction of dynamic display chip MAX7219, a display-driving circuit for high-brightness 8-bit LED with the size of 8-inch was proposed. The advantages of MAX7219 were retained, such as powerful function and simple programming. Static display with adjustable brightness for large-size LED with higher voltage and current was achieved with the help of 74LS273 and ULN2803.
標(biāo)簽： 7219 MAX LED 數(shù)碼顯示
上傳時(shí)間： 2013-10-23
上傳用戶(hù)：31633073
為深入了解基于UC3854A控制的PFC變換器中的動(dòng)力學(xué)特性，研究系統(tǒng)參數(shù)變化對(duì)變換器中分岔現(xiàn)象的影響，在建立Boost PFC變換器雙閉環(huán)數(shù)學(xué)模型的基礎(chǔ)上，用Matlab軟件對(duì)變換器中慢時(shí)標(biāo)分岔及混沌等不穩(wěn)定現(xiàn)象進(jìn)行了仿真。在對(duì)PFC變換器中慢時(shí)標(biāo)分岔現(xiàn)象仿真的基礎(chǔ)上，分析了系統(tǒng)參數(shù)變化對(duì)分岔點(diǎn)的影響，并進(jìn)行了仿真驗(yàn)證。仿真結(jié)果清晰地顯示了輸入整流電壓的幅值變化對(duì)系統(tǒng)分岔點(diǎn)的影響。 Abstract: In order to better understand the dynamics characteristic of power factor correction converter based on UC3854A， and make the way that parameters change influences the bifurcation phenomena of the system clearly. The math model of the two closed loop circuits to the Boost PFC （Power Factor Correction） converter controller was built. Then， with the help of Matlab， the simulation for nonlinear phenomena such as chaos and slow-scale bifurcation in the PFC converter was made. Finally the factors that have influence to the phenomenon of bifurcation under slow-scale in PFC converter were analyzed. The simulation results clearly show the parameters change influences the bifurcation point of the system.
上傳時(shí)間： 2013-10-17
上傳用戶(hù)：杜瑩12345
The PCA9536 is an 8-pin CMOS device that provides 4 bits of General Purpose parallel Input/Output (GPIO) expansion for I2C-bus/SMBus applications and was developed to enhance the NXP Semiconductors family of I2C-bus I/O expanders. I/O expanders provide a simple solution when additional I/O is needed for ACPI power switches, sensors, push buttons, LEDs, fans, etc.
上傳時(shí)間： 2013-10-27
上傳用戶(hù)：w230825hy
The PCA9534 is a 16-pin CMOS device that provide 8 bits of General Purpose parallel Input/Output (GPIO) expansion for I2C-bus/SMBus applications and was developed to enhance the NXP Semiconductors family of I2C-bus I/O expanders. The improvements include higher drive capability, 5 V I/O tolerance, lower supply current, individual I/O configuration, 400 kHz clock frequency, and smaller packaging. I/O expanders provide a simple solution when additional I/O is needed for ACPI power switches, sensors, push buttons, LEDs, fans, etc.
上傳時(shí)間： 2013-11-17
上傳用戶(hù)：vodssv
at91rm9200啟動(dòng)過(guò)程教程 系統(tǒng)上電，檢測(cè)BMS，選擇系統(tǒng)的啟動(dòng)方式，如果BMS為高電平，則系統(tǒng)從片內(nèi)ROM啟動(dòng)。AT91RM9200的ROM上電后被映射到了0x0和0x100000處，在這兩個(gè)地址處都可以訪問(wèn)到ROM。由于9200的ROM中固化了一個(gè)BOOTLOAER程序。所以PC從0X0處開(kāi)始執(zhí)行這個(gè)BOOTLOAER(準(zhǔn)確的說(shuō)應(yīng)該是一級(jí)BOOTLOADER)。這個(gè)BOOTLOER依次完成以下步驟： 1、PLL SETUP，設(shè)置PLLB產(chǎn)生48M時(shí)鐘頻率提供給USB DEVICE。同時(shí)DEBUG USART也被初始化為48M的時(shí)鐘頻率； 2、相應(yīng)模式下的堆棧設(shè)置； 3、檢測(cè)主時(shí)鐘源（Main oscillator）； 4、中斷控制器（AIC）的設(shè)置； 5、C 變量的初始化； 6、跳到主函數(shù)。 完成以上步驟后，我們可以認(rèn)為BOOT過(guò)程結(jié)束，接下來(lái)的就是LOADER的過(guò)程，或者也可以認(rèn)為是裝載二級(jí)BOOTLOER。AT91RM9200按照DATAFLASH、EEPROM、連接在外部總線上的8位并行FLASH的順序依次來(lái)找合法的BOOT程序。所謂合法的指的是在這些存儲(chǔ)設(shè)備的開(kāi)始地址處連續(xù)的存放的32個(gè)字節(jié)，也就是8條指令必須是跳轉(zhuǎn)指令或者裝載PC的指令，其實(shí)這樣規(guī)定就是把這8條指令當(dāng)作是異常向量表來(lái)處理。必須注意的是第6條指令要包含將要裝載的映像的大小。關(guān)于如何計(jì)算和寫(xiě)這條指令可以參考用戶(hù)手冊(cè)。一旦合法的映像找到之后，則BOOT程序會(huì)把找到的映像搬到SRAM中去，所以映像的大小是非常有限的，不能超過(guò)16K-3K的大小。當(dāng)BOOT程序完成了把合法的映像搬到SRAM的任務(wù)以后，接下來(lái)就進(jìn)行存儲(chǔ)器的REMAP，經(jīng)過(guò)REMAP之后，SRAM從映設(shè)前的0X200000地址處被映設(shè)到了0X0地址并且程序從0X0處開(kāi)始執(zhí)行。而ROM這時(shí)只能在0X100000這個(gè)地址處看到了。至此9200就算完成了一種形式的啟動(dòng)過(guò)程。如果BOOT程序在以上所列的幾種存儲(chǔ)設(shè)備中找到合法的映像，則自動(dòng)初始化DEBUG USART口和USB DEVICE口以準(zhǔn)備從外部載入映像。對(duì)DEBUG口的初始化包括設(shè)置參數(shù)115200 8 N 1以及運(yùn)行XMODEM協(xié)議。對(duì)USB DEVICE進(jìn)行初始化以及運(yùn)行DFU協(xié)議。現(xiàn)在用戶(hù)可以從外部（假定為PC平臺(tái)）載入你的映像了。在PC平臺(tái)下，以WIN2000為例，你可以用超級(jí)終端來(lái)完成這個(gè)功能，但是還是要注意你的映像的大小不能超過(guò)13K。一旦正確從外部裝載了映像，接下來(lái)的過(guò)程就是和前面一樣重映設(shè)然后執(zhí)行映像了。我們上面講了BMS為高電平，AT91RM9200選擇從片內(nèi)的ROM啟動(dòng)的一個(gè)過(guò)程。如果BMS為低電平，則AT91RM9200會(huì)從片外的FLASH啟動(dòng)，這時(shí)片外的FLASH的起始地址就是0X0了，接下來(lái)的過(guò)程和片內(nèi)啟動(dòng)的過(guò)程是一樣的，只不過(guò)這時(shí)就需要自己寫(xiě)啟動(dòng)代碼了，至于怎么寫(xiě)，大致的內(nèi)容和ROM的BOOT差不多，不同的硬件設(shè)計(jì)可能有不一樣的地方，但基本的都是一樣的。由于片外FLASH可以設(shè)計(jì)的大，所以這里編寫(xiě)的BOOTLOADER可以一步到位，也就是說(shuō)不用像片內(nèi)啟動(dòng)可能需要BOOT好幾級(jí)了，目前AT91RM9200上使用較多的bootloer是u-boot，這是一個(gè)開(kāi)放源代碼的軟件，用戶(hù)可以自由下載并根據(jù)自己的應(yīng)用配置。總的說(shuō)來(lái)，筆者以為AT91RM9200的啟動(dòng)過(guò)程比較簡(jiǎn)單，ATMEL的服務(wù)也不錯(cuò)，不但提供了片內(nèi)啟動(dòng)的功能，還提供了UBOOT可供下載。筆者寫(xiě)了一個(gè)BOOTLODER從片外的FLASHA啟動(dòng)，效果還可以。 uboot結(jié)構(gòu)與使用uboot是一個(gè)龐大的公開(kāi)源碼的軟件。他支持一些系列的arm體系，包含常見(jiàn)的外設(shè)的驅(qū)動(dòng)，是一個(gè)功能強(qiáng)大的板極支持包。其代碼可以 http://sourceforge.net/projects/u-boot下載 在9200上，為了啟動(dòng)uboot，還有兩個(gè)boot軟件包，分別是loader和boot。分別完成從sram和flash中的一級(jí)boot。其源碼可以從atmel的官方網(wǎng)站下載。 我們知道，當(dāng)9200系統(tǒng)上電后，如果bms為高電平，則系統(tǒng)從片內(nèi)rom啟動(dòng)，這時(shí)rom中固化的boot程序初始化了debug口并向其發(fā)送'c'，這時(shí)我們打開(kāi)超級(jí)終端會(huì)看到ccccc...。這說(shuō)明系統(tǒng)已經(jīng)啟動(dòng)，同時(shí)xmodem協(xié)議已經(jīng)啟動(dòng)，用戶(hù)可以通過(guò)超級(jí)終端下載用戶(hù)的bootloader。作為第一步，我們下載loader.bin.loader.bin將被下載到片內(nèi)的sram中。這個(gè)loder完成的功能主要是初始化時(shí)鐘，sdram和xmodem協(xié)議，為下載和啟動(dòng)uboot做準(zhǔn)備。當(dāng)下載了loader.bin后，超級(jí)終端會(huì)繼續(xù)打印：ccccc....。這時(shí)我們就可以下在uboot了。uboot將被下載到sdram中的一個(gè)地址后并把pc指針調(diào)到此處開(kāi)始執(zhí)行uboot。接著我們就可以在終端上看到uboot的shell啟動(dòng)了，提示符uboot>，用戶(hù)可以u(píng)boot>help 看到命令列表和大概的功能。uboot的命令包含了對(duì)內(nèi)存、flash、網(wǎng)絡(luò)、系統(tǒng)啟動(dòng)等一些命令。 如果系統(tǒng)上電時(shí)bms為低電平，則系統(tǒng)從片外的flash啟動(dòng)。為了從片外的flash啟動(dòng)uboot,我們必須把boot.bin放到0x0地址出，使得從flash啟動(dòng)后首先執(zhí)行boot.bin，而要少些boot.bin，就要先完成上面我們講的那些步驟，首先開(kāi)始從片內(nèi)rom啟動(dòng)uboot。然后再利用uboot的功能完成把boot.bin和uboot.gz燒寫(xiě)到flash中的目的，假如我們已經(jīng)啟動(dòng)了uboot,可以這樣操作： uboot>protect off all uboot>erase all uboot>loadb 20000000 uboot>cp.b 20000000 10000000 5fff uboot>loadb 21000000 uboot>cp.b 210000000 10010000 ffff 然后系統(tǒng)復(fù)位，就可以看到系統(tǒng)先啟動(dòng)boot，然后解壓縮uboot.gz，然后啟動(dòng)uboot。注意，這里uboot必須壓縮成.gz文件，否則會(huì)出錯(cuò)。 怎么編譯這三個(gè)源碼包呢，首先要建立一個(gè)arm的交叉編譯環(huán)境，關(guān)于如何建立，此處不予說(shuō)明。建立好了以后，分別解壓源碼包，然后修改Makefile中的編譯器項(xiàng)目，正確填寫(xiě)你的編譯器的所在路徑。 對(duì)loader和boot，直接make。對(duì)uboot,第一步：make_at91rm9200dk,第二步：make。這樣就會(huì)在當(dāng)前目錄下分別生成*.bin文件,對(duì)于uboot.bin，我們還要壓縮成.gz文件。 也許有的人對(duì)loader和boot搞不清楚為什么要兩個(gè)，有什么區(qū)別嗎？首先有區(qū)別，boot主要完成從flash中啟動(dòng)uboot的功能，他要對(duì)uboot的壓縮文件進(jìn)行解壓，除此之外，他和loader并無(wú)大的區(qū)別，你可以把boot理解為在loader的基礎(chǔ)上加入了解壓縮.gz的功能而已。所以這兩個(gè)并無(wú)多大的本質(zhì)不同，只是他們的使命不同而已。 特別說(shuō)名的是這三個(gè)軟件包都是開(kāi)放源碼的，所以用戶(hù)可以根據(jù)自己的系統(tǒng)的情況修改和配置以及裁減，打造屬于自己系統(tǒng)的bootloder。
上傳時(shí)間： 2013-10-27
上傳用戶(hù)：wsf950131
The PCA9534 is a 16-pin CMOS device that provide 8 bits of General Purpose parallel Input/Output (GPIO) expansion for I2C-bus/SMBus applications and was developed to enhance the NXP Semiconductors family of I2C-bus I/O expanders. The improvements include higher drive capability, 5 V I/O tolerance, lower supply current, individual I/O configuration, 400 kHz clock frequency, and smaller packaging. I/O expanders provide a simple solution when additional I/O is needed for ACPI power switches, sensors, push buttons, LEDs, fans, etc.
標(biāo)簽： interru SMBus power 9534
上傳時(shí)間： 2013-10-10
上傳用戶(hù)：inwins
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