The sample software includes, common library, peripheral APIs, and test modules for the APIs. The common library include startup file, standard definition and header files, processor specific setup module, generic interrupt related APIs, timer routine, and scatter loading file. The peripheral directories include, GPIO, PWM, Real-time clock, timer, SPI, I2C, Watchdog timer, UART, external interrupt, etc.
標簽： APIs peripheral The includes
上傳時間： 2014-01-15
上傳用戶：zl5712176
ST7787 芯片的SPEC，比亞迪2.4inchLCM的SPEC。The ST7787 is a single-chip controller/driver for 262K-color, graphic type TFT-LCD. It consists of 720 source line and 320 gate line driving circuits. This chip is capable of connecting directly to an external microprocessor, and accepts Serial Peripheral Interface (SPI), 8-bits/9-bits/16-bits/18-bits parallel interface. Display data can be stored in the on-chip display data RAM of 240x320x18 bits. It can perform display data RAM read/write operation with no external operation clock to minimize power consumption. In addition, because of the integrated power supply circuits necessary to drive liquid crystal, it is possible to make a display system with the fewest components.
上傳時間： 2016-09-22
上傳用戶：woshini123456
s3c2410 ads下的測試程序移植到 iar ewarm v5.2；包括 Please select function : 0 : Please input 1-14 to select test 1 : Real time clock display 2 : 4 key array test 3 : Buzzer test 4 : ADC test 5 : IIC EEPROM test 6 : Touchpanel test 7 : 3.5# TFT LCD 240*320 test 8 : UDA1341 play audio test 9 : UDA1341 record audio test 10 : IRDA test 11 : SD Card write and read test 12 : COM port ( UART2 ) test
標簽： Please select function s3c2410
上傳時間： 2016-10-01
上傳用戶：225588
The Inter IC bus or I2C bus is a simple bidirectional two wire bus designed primarily for general control and data transfer communication between ICs. Some of the features of the I2C bus are: • Two signal lines, a serial data line (SDA) and a serial clock line (SCL), and ground are required. A 12V supply line (500mA max.) for powering the peripherals often may be present. • Each device connected to the bus is software addressable by a unique address and simple master/ slave relationships exist at all times masters can operate as master-transmitters or as master-receivers. • The I2C bus is a true multi-master bus including collision detection and arbitration to prevent data corruption if two or more masters simultaneously initiate data transfer systems. • Serial, 8-bit oriented, bidirectional data transfers can be made at up to 100 KBit/s in the standard mode or up to 400 KBit/s in the fast mode.
標簽： bus bidirectional primarily designed
上傳時間： 2013-12-11
上傳用戶：jeffery
精致、漂亮、實用的日歷選擇代碼，Calendar is a Javascript class that adds accessible and unobtrusive date-pickers to your form elements. This class is a compilation of many date-pickers I have implemented over the years and has been completely re-written for Mootools. I have tried to include all the features that have been most useful while streamlining the class itself to keep it as small as possible. Use the links below to see what features are available in Calendar and how it might enhance the accessibility, usability and validation of form elements on your website.
標簽： 代碼
上傳時間： 2014-01-04
上傳用戶：cc1
介紹一個漂亮并且實用的js日歷，編寫jsp頁面時引入其中的calendar.jsp即可。
標簽：
上傳時間： 2016-11-02
上傳用戶：as275944189
Top module name : SHIFTER (File name : SHIFTER.v) 2. Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGHT. 3. Output pins: OUT [15:0]. 4. Input signals generated from test pattern are latched in one cycle and are synchronized at clock rising edge. 5. The SHIFT signal describes the shift number. The shift range is 0 to 15. 6. When the signal RIGHT is high, it shifts input data to right. On the other hand, it shifts input data to left. 7. When the signal SIGN is high, the input data is a signed number and it shifts with sign extension. However, the input data is an unsigned number if the signal SIGN is low. 8. You can only use following gates in Table I and need to include the delay information (Tplh, Tphl) in your design.
上傳時間： 2013-12-13
上傳用戶：himbly
Top module name : SHIFTER (File name : SHIFTER.v) 2. Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGHT. 3. Output pins: OUT [15:0]. 4. Input signals generated from test pattern are latched in one cycle and are synchronized at clock rising edge. 5. The SHIFT signal describes the shift number. The shift range is 0 to 15. 6. When the signal RIGHT is high, it shifts input data to right. On the other hand, it shifts input data to left. 7. When the signal SIGN is high, the input data is a signed number and it shifts with sign extension. However, the input data is an unsigned number if the signal SIGN is low. 8. You can only use following gates in Table I and need to include the delay information (Tplh, Tphl) in your design.
上傳時間： 2014-01-20
上傳用戶：三人用菜
大學計算機操作系統課程設計，完成頁面置換功能，利用clock算法
上傳時間： 2014-02-01
上傳用戶：杜瑩12345
本模擬I2C軟件包包含了I2C操作的底層子程序，使用前要定義 好SCL和SDA。在標準8051模式(12 Clock)下,對主頻要求是不高于12MHz(即1個 機器周期1us) 若Fosc>12MHz則要增加相應的NOP指令數。(總線時序符合I2C標 準模式,100Kbit/S)。
上傳時間： 2013-12-08
上傳用戶：ruixue198909
