last time when i came here to find some clock references. but most of them can not works well. so this files works well on FPGA board.
標簽： references clock works last
上傳時間： 2015-11-07
上傳用戶：baitouyu
ami8563 clock source code
上傳時間： 2015-11-15
上傳用戶：anng
Java Clock是個免費的嵌在HTML文檔中的小應用程序，可以在你的網頁上顯示一個時鐘，既可以顯示模擬形式的時鐘，還可以顯示數字形式的時鐘，你通過點擊，進行切換。
上傳時間： 2014-11-26
上傳用戶：水口鴻勝電器
Clock gating logic for LEON3 processor.
標簽： processor gating Clock LEON3
上傳時間： 2014-01-19
上傳用戶：yulg
fpga clock 設計，資料較好，供大家參考，非商用目的哦
上傳時間： 2013-12-11
上傳用戶：rocwangdp
pic16f8 based clock, it display the time on the TV display. This include source code and sch
標簽： display the include source
上傳時間： 2015-11-30
上傳用戶：nanfeicui
There are many different (and often confusing) terms associated with clock-based devices. This application note attempts to clarify these terms, and hence serves as a comprehensive reference on clock terminology. This application note can be divided into two sections. The first section describes and distinguishes between various clock sources available today. The second section defines and distinguishes between various parameters used to describe clocks. This section also provides methods of measuring some of these parameters.
標簽： clock-based associated different confusing
上傳時間： 2015-12-02
上傳用戶：sssl
Jitter is extremely important in systems using PLL-based clock drivers. The effects of jitter range from not having any effect on system operation to rendering the system completely non-functional. This application note provides the reader with a clear understanding of jitter in high-speed systems. It introduces the reader to various kinds of jitter in high-speed systems, their causes and their effects, and methods of reducing jitter. This application note will concentrate on jitter in PLL-based frequency synthesizers.
標簽： extremely PLL-based important drivers
上傳時間： 2014-11-25
上傳用戶：asddsd
Cypress Semiconductor makes a variety of PLL-based clock generators. This application note provides a set of recommendations to optimize usage of Cypress clock devices in a system. The application note begins with recommended termination techniques for clock generators. Subsequently, power supply filtering and bypassing is discussed. Finally, the application note provides some recommendations on board layout.
標簽： Semiconductor application generators PLL-based
上傳時間： 2013-12-20
上傳用戶：水中浮云
清華大學－電子信息工程系－實驗用ARM-linux－源代碼－CLOCK篇
上傳時間： 2015-12-06
上傳用戶：caiiicc
