The VGA example generates a 320x240 diffusion-limited-aggregation (DLA) on Altera DE2 board. A DLA is a clump formed by sticky particles adhering to an existing structure. In this design, we start with one pixel at the center of the screen and allow a random walker to bounce around the screen until it hits the pixel at the center. It then sticks and a new walker is started randomly at one of the 4 corners of the screen. The random number generators for x and y steps are XOR feedback shift registers (see also Hamblen, Appendix A). The VGA driver, PLL, and reset ControlLER from the DE2 CDROM are necessary to compile this example. Note that you must push KEY0 to start the state machine.
標簽： diffusion-limited-aggregation DLA generates 320x240
上傳時間： 2014-01-16
上傳用戶：225588
ISCAS的benchmark 含有原理圖，VHDL、VerilogHDL網表，測試數據等。 27-channel interrupt ControlLER
上傳時間： 2016-12-07
上傳用戶：h886166
The TMS320LF240xA and TMS320LC240xA devices, new members of the TMS320C24x generation of digital signal processor (DSP) ControlLERs, are part of the TMS320C2000 platform of fixed-point DSPs. The 240xA devices offer the enhanced TMS320 DSP architectural design of the C2xx core CPU for low-cost, low-power, and high-performance processing capabilities. Several advanced peripherals, optimized for digital motor and motion control applications, have been integrated to provide a true single-chip DSP ControlLER. While code-compatible with the existing C24x DSP ControlLER devices, the 240xA offers increased processing performance (40 MIPS) and a higher level of peripheral integration. See the TMS320x240xA Device Summary section for device-specific features.
標簽： TMS 320 generation 240
上傳時間： 2013-12-16
上傳用戶：GavinNeko
DDR SDRAM控制器的VHDL源代碼，含詳細設計文檔。 The DDR, DCM, and SelectI/O™ features in the Virtex™ -II architecture make it the perfect choice for implementing a ControlLER of a Double Data Rate (DDR) SDRAM. The Digital Clock Manager (DCM) provides the required Delay Locked Loop (DLL), Digital Phase Shift (DPS), and Digital Frequency Synthesis (DFS) functions. This application note describes a ControlLER design for a 16-bit DDR SDRAM. The application note and reference design are enhanced versions of XAPP200 targeted to the Virtex-II series of FPGAs. At a clock rate of 133 MHz, 16-bit data changes at both clock edges. The reference design is fully synthesizable and achieves 133 MHz performance with automatic place and route tools.
上傳時間： 2014-11-01
上傳用戶：l254587896
AR6001 WLAN Driver for SDIO installation Read Me March 26,2007 (based on k14 fw1.1) Windows CE Embedded CE 6.0 driver installation. 1. Unzip the installation file onto your system (called installation directory below) 2. Create an OS design or open an existing OS design in Platform Builder 6.0. a. The OS must support the SD bus driver and have an SD Host ControlLER driver (add these from Catalog Items). b. Run image size should be set to allow greater than 32MB. 3. a. From the Project menu select Add Existing Subproject... b. select AR6K_DRV.pbxml c. select open This should create a subproject within your OS Design project for the AR6K_DRV driver. 4. Build the solution.
標簽： installation Windows Driver March
上傳時間： 2014-09-06
上傳用戶：yuzsu
MPC8260-MCC-HOWTO Abstract: This document attempts to give the linux developer community of motorola(R) s mpc8260 processor a fairly good idea of programming details of Multi Channel ControlLER. This document can be distributed under GPL version 2.0 or later, GPL is available at (http://www.gnu.org/copyleft/gpl.html)
標簽： MCC-HOWTO developer community Abstract
上傳時間： 2017-01-11
上傳用戶：silenthink
單片微型計算機是微型計算機發展中的一個重要分支，是把構成一臺微型計算機的主要部件如中央處理器(CPU)、存儲器(RAM/ROM)和各種功能I/O接口集成在一塊芯片上的單芯片微型計算機(Single Chip Micro Computer),簡稱單片機.由于它的結構與指令功能都是按工業控制要求設計的,且近年來單片機著力擴展了各種控制功能如A/D、PWM等,因此我們更多時候稱其為一個單片形態的微控制器(Single Chip Micro ControlLER),或直接稱其為微控制器(Micro ControlLER)。
上傳時間： 2014-01-18
上傳用戶：zhaoq123
新加原版MemDev功能模塊 UCGUI3.90版源碼有如下幾點新的變化. 1.這個版本的UCGUI提供了模擬器的源碼[本站上似乎有3.24版的帶模擬器源碼的UCGUI下載, 大家比較一下..] 2.還有JPEG圖版支持 3.ListView控件支持. 4.Menu菜單支持. 5.ScrollBar滾動條支持. 6.multi-ControlLER多控制器支持.
上傳時間： 2017-03-18
上傳用戶：zhanditian
The TW2835 has four high quality NTSC/PAL video decoders, dual color display ControlLERs and dual video encoders. The TW2835 contains four built-in analog anti-aliasing filters, four 10bit Analog-to-Digital converters, and proprietary digital gain/clamp ControlLER, high quality Y/C separator to reduce cross-noise and high performance free scaler. Four built-in motion,
標簽： dual ControlLERs decoders display
上傳時間： 2017-03-20
上傳用戶：來茴
這是I2c網關Id獨立燒寫程序， 燒寫的ID必須要求是：“0~9”、“a~z”、“A~Z”的16為字符才能燒寫成功。 其中當是輸入的小寫字母時，自動轉換為大些燒入。 如： 1） # ./burnID 0123456789abcdef 燒入的是：0123456789ABCDEF 2] # ./burnID 0123456789@ cdef 燒入不成功，因為有其他字符 3） # ./burnID 0123456789abcdefDfs 燒入也不成，因為超過16個字符 built-in analog anti-aliasing filters, four 10bit Analog-to-Digital converters, and proprietary digital gain/clamp ControlLER, high quality Y/C separator to reduce cross-noise and high performance free scaler. Four built-in motion,
上傳時間： 2017-03-20
上傳用戶：playboys0
