ANALOG INPUT BANDWIDTH is a measure of the frequencyat which the reconstructed output fundamental drops3 dB below its low frequency value for a full scale input. Thetest is performed with fIN equal to 100 kHz plus integer multiplesof fCLK. The input frequency at which the output is −3dB relative to the low frequency input signal is the full powerbandwidth.APERTURE JITTER is the variation in aperture delay fromsample to sample. Aperture jitter shows up as input noise.APERTURE DELAY See Sampling Delay.BOTTOM OFFSET is the difference between the input voltagethat just causes the output code to transition to the firstcode and the negative reference voltage. Bottom Offset isdefined as EOB = VZT–VRB, where VZT is the first code transitioninput voltage and VRB is the lower reference voltage.Note that this is different from the normal Zero Scale Error.CONVERSION LATENCY See PIPELINE DELAY.CONVERSION TIME is the time required for a completemeasurement by an analog-to-digital converter. Since theConversion Time does not include acquisition time, multiplexerset up time, or other elements of a complete conversioncycle, the conversion time may be less than theThroughput Time.DC COMMON-MODE ERROR is a specification which appliesto ADCs with differential inputs. It is the change in theoutput code that occurs when the analog voltages on the twoinputs are changed by an equal amount. It is usually expressed in LSBs.
標(biāo)簽： Converter Defi ADC 轉(zhuǎn)換器
上傳時(shí)間： 2013-11-12
上傳用戶：pans0ul
PCB設(shè)計(jì)問(wèn)題集錦 問(wèn)：PCB圖中各種字符往往容易疊加在一起，或者相距很近，當(dāng)板子布得很密時(shí)，情況更加嚴(yán)重。當(dāng)我用Verify Design進(jìn)行檢查時(shí)，會(huì)產(chǎn)生錯(cuò)誤，但這種錯(cuò)誤可以忽略。往往這種錯(cuò)誤很多，有幾百個(gè)，將其他更重要的錯(cuò)誤淹沒(méi)了，如何使Verify Design會(huì)略掉這種錯(cuò)誤，或者在眾多的錯(cuò)誤中快速找到重要的錯(cuò)誤。 答：可以在顏色顯示中將文字去掉,不顯示后再檢查;并記錄錯(cuò)誤數(shù)目。但一定要檢查是否真正屬于不需要的文字。 問(wèn)： What’s mean of below warning:(6230,8330 L1) Latium Rule not checked: COMPONENT U26 component rule.答：這是有關(guān)制造方面的一個(gè)檢查，您沒(méi)有相關(guān)設(shè)定，所以可以不檢查。 問(wèn)： 怎樣導(dǎo)出jop文件？答：應(yīng)該是JOB文件吧？低版本的powerPCB與PADS使用JOB文件。現(xiàn)在只能輸出ASC文件，方法如下STEP：FILE/EXPORT/選擇一個(gè)asc名稱/選擇Select ALL/在Format下選擇合適的版本/在Unit下選Current比較好/點(diǎn)擊OK/完成然后在低版本的powerPCB與PADS產(chǎn)品中Import保存的ASC文件，再保存為JOB文件。 問(wèn)： 怎樣導(dǎo)入reu文件？答：在ECO與Design 工具盒中都可以進(jìn)行，分別打開(kāi)ECO與Design 工具盒，點(diǎn)擊右邊第2個(gè)圖標(biāo)就可以。 問(wèn)： 為什么我在pad stacks中再設(shè)一個(gè)via:1(如附件）和默認(rèn)的standardvi(如附件）在布線時(shí)V選擇1，怎么布線時(shí)按add via不能添加進(jìn)去這是怎么回事，因?yàn)橛袝r(shí)要使用兩種不同的過(guò)孔。答：PowerPCB中有多個(gè)VIA時(shí)需要在Design Rule下根據(jù)信號(hào)分別設(shè)置VIA的使用條件，如電源類只能用Standard VIA等等，這樣操作時(shí)就比較方便。詳細(xì)設(shè)置方法在PowerPCB軟件通中有介紹。 問(wèn)：為什么我把On-line DRC設(shè)置為prevent..移動(dòng)元時(shí)就會(huì)彈出(圖2),而你們教程中也是這樣設(shè)置怎么不會(huì)呢?答：首先這不是錯(cuò)誤,出現(xiàn)的原因是在數(shù)據(jù)中沒(méi)有BOARD OUTLINE.您可以設(shè)置一個(gè),但是不使用它作為CAM輸出數(shù)據(jù). 問(wèn)：我用ctrl+c復(fù)制線時(shí)怎設(shè)置原點(diǎn)進(jìn)行復(fù)制，ctrl+v粘帖時(shí)總是以最下面一點(diǎn)和最左邊那一點(diǎn)為原點(diǎn) 答： 復(fù)制布線時(shí)與上面的MOVE MODE設(shè)置沒(méi)有任何關(guān)系,需要在右鍵菜單中選擇,這在PowerPCB軟件通教程中有專門(mén)介紹. 問(wèn)：用(圖4)進(jìn)行修改線時(shí)拉起時(shí)怎總是往左邊拉起(圖5)，不知有什么辦法可以輕易想拉起左就左，右就右。答： 具體條件不明,請(qǐng)檢查一下您的DESIGN GRID,是否太大了. 問(wèn)： 好不容易拉起右邊但是用(圖6)修改線怎么改怎么下面都會(huì)有一條不能和在一起，而你教程里都會(huì)好好的(圖8)答：這可能還是與您的GRID 設(shè)置有關(guān),不過(guò)沒(méi)有問(wèn)題,您可以將不需要的那段線刪除.最重要的是需要找到布線的感覺(jué),每個(gè)軟件都不相同,所以需要多練習(xí)。 問(wèn)： 尊敬的老師:您好！這個(gè)圖已經(jīng)畫(huà)好了，但我只對(duì)（如圖1）一種的完全間距進(jìn)行檢查，怎么錯(cuò)誤就那么多，不知怎么改進(jìn)。請(qǐng)老師指點(diǎn)。這個(gè)圖在附件中請(qǐng)老師幫看一下，如果還有什么問(wèn)題請(qǐng)指出來(lái)，本人在改進(jìn)。謝！！！！！答：請(qǐng)注意您的DRC SETUP窗口下的設(shè)置是錯(cuò)誤的,現(xiàn)在選中的SAME NET是對(duì)相同NET進(jìn)行檢查,應(yīng)該選擇NET TO ALL.而不是SAME NET有關(guān)各項(xiàng)參數(shù)的含義請(qǐng)仔細(xì)閱讀第5部教程. 問(wèn)： U101元件已建好，但元件框的拐角處不知是否正確，請(qǐng)幫忙CHECK 答：元件框等可以通過(guò)修改編輯來(lái)完成。問(wèn)： U102和U103元件沒(méi)建完全，在自動(dòng)建元件參數(shù)中有幾個(gè)不明白：如：SOIC--》silk screen欄下spacing from pin與outdent from first pin對(duì)應(yīng)U102和U103元件應(yīng)寫(xiě)什么數(shù)值，還有這兩個(gè)元件SILK怎么自動(dòng)設(shè)置，以及SILK內(nèi)有個(gè)圓圈怎么才能畫(huà)得與該元件參數(shù)一致。 答：Spacing from pin指從PIN到SILK的Y方向的距離,outdent from first pin是第一PIN與SILK端點(diǎn)間的距離.請(qǐng)根據(jù)元件資料自己計(jì)算。
標(biāo)簽： PCB 設(shè)計(jì)問(wèn)題 集錦
上傳時(shí)間： 2013-10-07
上傳用戶：comer1123
LTC®3630 是一款通用的突發(fā)模式 (Burst Mode®) 同步降壓型 DC/DC 轉(zhuǎn)換器，其包括三種可通過(guò)引腳選擇的預(yù)設(shè)輸出電壓。
上傳時(shí)間： 2013-11-03
上傳用戶：yupw24
安規(guī)基礎(chǔ)
標(biāo)簽： Compatibility Mode 電源 安規(guī)
上傳時(shí)間： 2013-10-10
上傳用戶：bs2005
交流瓦特/瓦特小時(shí)，乏爾/乏爾小時(shí)轉(zhuǎn)換器 特點(diǎn)： 精確度0.25%滿刻度 多種輸入,輸出選擇 輸入與輸出絕緣耐壓2仟伏特/1分鐘 沖擊電壓測(cè)試5仟伏特(1.2x50us) 突波電壓測(cè)試2.5仟伏特(0.25ms/1MHz) (IEC255-4) 尺寸小，穩(wěn)定性高 主要規(guī)格： 精確度: 0.25% F.S. (23 ±5℃) 輸入負(fù)載: <0.2VA (Voltage) <0.2VA (Current) 最大過(guò)載能力: Current related input:3 x rated continuous 10 x rated 30 sec. ,25 x rated 3sec. 50 x rated 1sec. Voltage related input:maximum 2 x rated continuous 輸出反應(yīng)速度: < 250ms(0~90%) 輸出負(fù)載能力: < 10mA for voltage mode < 10V for current mode 輸出之漣波 : < 0.1% F.S. 脈波輸出型態(tài): Photocouple of open collector (max.30V/40mA) 歸零調(diào)整范圍: 0~±5% F.S. 最大值調(diào)整范圍: 0~±10% F.S. 溫度系數(shù): 100ppm/℃ (0~50℃) 隔離特性: Input/Output/Power/Case 絕緣阻抗: >100Mohm with 500V DC 絕緣耐壓能力: 2KVac/1 min. (input/output/power/case) 突波測(cè)試: ANSI C37.90a/1974,DIN-IEC 255-4 impulse voltage 5KV(1.2x50us) 使用環(huán)境條件: -20~60℃(20 to 90% RH non-condensed) 存放環(huán)境條件: -30~70℃(20 to 90% RH non-condensed) CE認(rèn)證: EN 55022:1998/A1:2000 Class A EN 61000-3-2:2000 EN 61000-3-3:1995/A1:2001 EN 55024:1998/A1:2001
標(biāo)簽： 瓦特 交流 轉(zhuǎn)換器
上傳時(shí)間： 2013-11-11
上傳用戶：wettetw
DC/DC 升壓IC：The FP6291 is a current mode boost DC-DC converter. Its PWM circuitry with built-in 0.25 Ω power MOSFET make this regulator highly power efficient. The internal compensation network also minimizes as much as 6 external component counts. The non-inverting input of error amplifier connects to a 0.6V precision reference voltage and internal soft-start function can reduce the inrush current. The FP6291 is available in the SOT23-6L package and provides space-saving PCB for the application fields.
上傳時(shí)間： 2013-11-07
上傳用戶：3294322651
Easy-to-use and compact point-of-load power suppliesare necessary in systems with widely distributed, highcurrent, low voltage loads. The LTC®3415 provides acompact, simple and versatile solution. It includes a pairof integrated complementary power MOSFETs (32mΩtop and 25mΩ bottom) and requires no external senseresistor. A complete design requires an inductor andinput/output capacitors, and that’s it. The result is a fast,constant frequency, 7A current mode DC/DC switchingregulator.
標(biāo)簽： 387 DN 級(jí)聯(lián) 負(fù)載
上傳時(shí)間： 2013-10-18
上傳用戶：avensy
Battery powered applications that have a signifi cantamount of time in standby mode, require electrical circuitsto operate with a low quiescent current to preserve batterylife. The LTC3835 synchronous step-down controlleris an excellent solution with its ultralow quiescent current(80μA). Other features make it uniquely qualifi ed tosatisfy the needs of automotive applications. A wide 4Vto 36V input voltage range protects the supply againsthigh input voltage transients and is compatible with lowvoltage cold crank conditions. The constant frequencycurrent-mode architecture with high-side inductor current
上傳時(shí)間： 2013-11-20
上傳用戶：stewart·
Automotive batteries, industrial power supplies, distributedsupplies and wall transformers are all sources ofwide-ranging high voltage inputs. The easiest way to stepdown these sources is with a high voltage monolithicstep-down regulator that can directly accept a wide inputrange and produce a well-regulated output. The LT®3493accepts inputs from 3.6V to 36V and LT3481 acceptsinputs from 3.6V to 34V. Both provide excellent lineand load regulation and dynamic response. The LT3481offers a high effi ciency solution over a wide load range andkeeps the output ripple low during Burst Mode® operationwhile the LT3493 provides a tiny solution with minimalexternal components. The LT3493 operates at 750kHzand the LT3481 has adjustable frequency from 300kHzto 2.8MHz. High frequency operation enables the use ofsmall, low cost inductors and ceramic capacitors.
標(biāo)簽： 寬 輸入 降壓型穩(wěn)壓器
上傳時(shí)間： 2014-12-24
上傳用戶：Pzj
The LTC®3562 quad output step-down regulator is designedfor multicore handheld microprocessor applications thatoperate from a single Li-Ion battery. Its four monolithic, higheffi ciency buck regulators support Intel’s mobile CPU P-Stateand C-State energy saving operating modes. The outputvoltages are independently controllable via I2C, and eachoutput can be independently started and shut down. Designerscan choose from power saving pulse-skipping mode orBurst Mode® operation, or select low noise LDO mode. Thespace-saving LTC3562 is available in a 3mm × 3mm QFNpackage and requires few external components.
上傳時(shí)間： 2013-10-07
上傳用戶：1583060504
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