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DATa

  • 在軟件Proteus中仿真ucos(ARM)

    在軟件Proteus中仿真ucos(ARM)\r\n1.移植除了OS_CPU.h,OS_CPU_A.s,OS_CPU_C.C 三個函數外,對中斷專門用了一個函數OS_int_A.s 按其中的規則寫中斷函數即可. \r\n2。應用實例為\\ArmUCOS\\App\\test1\\test.mcp,在周立功2104的板子上的ram中就可直接運行(code+DATa

    標簽: Proteus ucos ARM 軟件

    上傳時間: 2013-09-30

    上傳用戶:s363994250

  • US Navy VHDL Modelling Guide

      This document was developed under the Standard Hardware and Reliability Program (SHARP) TechnologyIndependent Representation of Electronic Products (TIREP) project. It is intended for use by VHSIC HardwareDescription Language (VHDL) design engineers and is offered as guidance for the development of VHDL modelswhich are compliant with the VHDL DATa Item Description (DID DI-EGDS-80811) and which can be providedto manufacturing engineering personnel for the development of production DATa and the subsequent productionof hardware. Most VHDL modeling performed to date has been concentrated at either the component level orat the conceptual system level. The assembly and sub-assembly levels have been largely disregarded. Under theSHARP TIREP project, an attempt has been made to help close this gap. The TIREP models are based upon lowcomplexity Standard Electronic Modules (SEM) of the format A configuration. Although these modules are quitesimple, it is felt that the lessons learned offer guidance which can readily be applied to a wide range of assemblytypes and complexities.

    標簽: Modelling Guide Navy VHDL

    上傳時間: 2014-12-23

    上傳用戶:xinhaoshan2016

  • allegro cx manual教程

    We would like to welcome you as a user of the Allegro CX, a rugged, handheld fi  eld PC for DATa collection. Developed with the input of DATa collection professionals worldwide, the Allegro CX is adaptable and versatile for use in a wide variety of DATa collection environments. The Allegro CX continues to utilize our ergonomic, lightweight design that is standard in our line of Allegro Field PCs. This design makes your Allegro easy to use for extended periods while moving to and from DATa collection sites in the fi  eld.  

    標簽: allegro manual cx 教程

    上傳時間: 2014-12-23

    上傳用戶:gaojiao1999

  • 傳感器信號調節 - 用于信號調節的ADC

    The trend in ADCs and DACs is toward higher speeds and higher resolutions atreduced power levels. Modern DATa converters generally operate on ±5V (dualsupply) or +5V (single supply). In fact, many new converters operate on a single +3Vsupply. This trend has created a number of design and applications problems whichwere much less important in earlier DATa converters, where ±15V supplies and ±10Vinput ranges were the standard.

    標簽: ADC 信號調節 傳感器

    上傳時間: 2013-11-16

    上傳用戶:sjw920325

  • 提高在噪聲環境下的磁卡讀寫器(MCR)系統

    Abstract: Most magnetic read head DATa sheets do not fully specify the frequency-dependent components andare often vague when specifying other key parameters. In some cases, the specifications of two very similarheads from two different manufacturers might be quite different in terms of parameters specified and omitted.The limitations in the DATa sheets make designing an optimum card reading system unnecessarily difficult andtime consuming. This document outlines a strategy to overcome the above shortcomings and offers guidelinesto overcome the noise issues.

    標簽: MCR 噪聲環境 磁卡讀寫器

    上傳時間: 2013-11-13

    上傳用戶:dysyase

  • FFT算法講解

    ADI dsp DATa

    標簽: FFT 算法

    上傳時間: 2013-11-17

    上傳用戶:stewart·

  • MEMS麥克風有助于提高系統設計效率

    A MEMS microphone IC is unique among Analog Devices, Inc., products in that its input is an acoustic pressure wave. For this reason, some specifications included in the DATa sheets for these parts may not be familiar, or familiar specifications may be applied in unfamiliar ways. This application note explains the specifica-tions and terms found in MEMS microphone DATa sheets so that the microphone can be appropriately designed into a system.

    標簽: MEMS 麥克風 系統設計 效率

    上傳時間: 2013-10-31

    上傳用戶:masochism

  • 校準復用器簡化系統校準設計

    Abstract: IC switches and multiplexers are proliferating, thanks to near-continual progress in lowering the supply voltage,incorporating fault-protected inputs, clamping the output voltage, and reducing the switch resistances. The latest of these advancesis the inclusion of precision resistors to allow two-point calibration of gain and offset in precision DATa-acquisition systems.

    標簽: 校準復用器 校準

    上傳時間: 2013-11-12

    上傳用戶:acwme

  • 精密DAC和看門狗提高模擬輸出安全

    Abstract: Using a DAC and a microprocessor supervisor, the system safety can be improved in industrial controllers, programmablelogiccontrollers (PLC), and DATa-acquisition systems. The analog output is set to zero-scale (or pin-programmable midscale) when amicroprocessor failure, optocoupler failure, or undervoltage condition occurs. A simple application is shown on how to implement thisfunction.

    標簽: DAC 精密 看門狗 模擬

    上傳時間: 2013-10-17

    上傳用戶:sjb555

  • XAPP854-數字鎖相環(DPLL)參考設計

    Many applications require a clock signal to be synchronous, phase-locked, or derived fromanother signal, such as a DATa signal or another clock. This type of clock circuit is important in

    標簽: XAPP DPLL 854 數字鎖相環

    上傳時間: 2014-12-23

    上傳用戶:qq21508895

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