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Abstract: This application note describes how to build, debug, and run applications on the on-board MAXQ622microcontroller to interface with the DS8005 DUAL smart card interface. This is demonstrated in both IAREmbedded Workbench and the Rowley CrossWorks IDE, using sample code provided with the kit.
上傳時(shí)間： 2013-10-29
上傳用戶：ddddddd
介紹了一種基于MSP430系列單片機(jī)和ADXL203加速度傳感器的數(shù)字式傾角儀，它不僅可以實(shí)現(xiàn)水平度檢測，而且可以測量00～3600范圍內(nèi)的任意傾角，分辨率可達(dá)O．1。。此外，由于該傾角儀輸出為數(shù)字結(jié)果，因此它也可以與其他的數(shù)字設(shè)備結(jié)合起來，組合成一個(gè)功能更加強(qiáng)大的儀器。該數(shù)字傾角儀可廣泛應(yīng)用于建筑、機(jī)械、道路、橋梁、石油、煤礦和地質(zhì)勘探等各種需要測量重力參考系下傾角的場合。關(guān)鍵詞：MSP430F133單片機(jī)；力敏傳感器；ADXL203加速度計(jì)；角度測量 Abstract：This paper presents a new style digital inclinometer which is developed on the basis of the MSP430F133 MCU and the ADXL203 DUAL axis aeeelerometer．This inclinometer not only can test levelness，but also can measure any angle between 0。and 360。with an accuracy of 0．1 O．In addition，its output is a digital result，which makes it possible to integrate itself with other digital devices to form a more functional unit．This inclinometer can be widely used in any construction site，oil field，coal-mine or geologic survey and SO on where it will provide the working people with convenience to measure any angles．Key words：MSP430F133 MCU；force sensor；ADXL203 accelerometer；angle measurement
上傳時(shí)間： 2013-11-14
上傳用戶：lizhizheng88
The PCA9541 is a 2-to-1 I2C-bus master selector designed for high reliability DUAL masterI2C-bus applications where system operation is required, even when one master fails orthe controller card is removed for maintenance. The two masters (for example, primaryand back-up) are located on separate I2C-buses that connect to the same downstreamI2C-bus slave devices. I2C-bus commands are sent by either I2C-bus master and are usedto select one master at a time. Either master at any time can gain control of the slavedevices if the other master is disabled or removed from the system. The failed master isisolated from the system and will not affect communication between the on-line masterand the slave devices on the downstream I2C-bus.
標(biāo)簽： master C-bus 9541 PCA
上傳時(shí)間： 2013-10-09
上傳用戶：3294322651
The MAX3243E device consists of three line drivers, five line receivers, and a DUAL charge-pump circuit with±15-kV ESD (HBM and IEC61000-4-2, Air-Gap Discharge) and ±8-kV ESD (IEC61000-4-2, Contact Discharge)protection on serial-port connection pins. The device meets the requirements of TIA/EIA-232-F and provides theelectrical interface between an asynchronous communication controller and the serial-port connector. Thiscombination of drivers and receivers matches that needed for the typical serial port used in an IBM PC/AT, orcompatible. The charge pump and four small external capacitors allow operation from a single 3-V to 5.5-Vsupply. In addition, the device includes an always-active noninverting output (ROUT2B), which allowsapplications using the ring indicator to transmit data while the device is powered down. The device operates atdata signaling rates up to 250 kbit/s and a maximum of 30-V/ms driver output slew rate.
標(biāo)簽： MULTICHANNEL 5.5 TO RS
上傳時(shí)間： 2013-10-19
上傳用戶：ddddddd
基于ADSP-BF561的數(shù)字?jǐn)z像系統(tǒng)設(shè)計(jì)Design of Digital Video Camera System Based on Digital Signal ProcessorADSP-BF561（浙江大學(xué) 信息與通信工程研究所，浙江 杭州 310027） 馬海杰, 劉云海摘要：介紹了基于ADI雙核的數(shù)字信號處理芯片ADSP-BF561 的數(shù)字?jǐn)z像系統(tǒng)實(shí)現(xiàn)方案。系統(tǒng)包括硬件和軟件兩部分，硬件主要有ADSP-BF561及其外圍電路、音視頻模數(shù)/數(shù)模轉(zhuǎn)換、CF卡/微硬盤接口等部分。軟件主要有操作系統(tǒng)及音視頻編解碼算法等部分。關(guān)鍵詞：ADSP-BF561 ;數(shù)字?jǐn)z像機(jī);微硬盤;MPEG-4;A/D;D/A中圖分類號:TN948.41文獻(xiàn)標(biāo)識碼:AAbstract: An implementation of digital video camera system based on ADI DUAL core digital signal processor ADSP-BF561 is introduced. The system can be divided into two parts——hardware and software design. The hardware design includes ADSP-BF561 and perpheral apparatus, A/D,D/A, CF card or Microdrive and so on. The software includes operating system , audio and video coding algorithm.Key words: ADSP-BF561; digital video camera; microdrive; MPEG-4;A/D;D/A
標(biāo)簽： ADSP-BF 561 數(shù)字?jǐn)z像 系統(tǒng)設(shè)計(jì)
上傳時(shí)間： 2013-11-10
上傳用戶：yl1140vista
This application note describes how the existing DUAL-port block memories in the Spartan™-IIand Virtex™ families can be used as Quad-Port memories. This essentially involves a dataaccess time (halved) versus functionality (doubled) trade-off. The overall bandwidth of the blockmemory in terms of bits per second will remain the same.
上傳時(shí)間： 2013-11-08
上傳用戶：lou45566
The SDI standards are the predominant standards for uncompressed digital videointerfaces in the broadcast studio and video production center. The first SDI standard,SD-SDI, allowed standard-definition digital video to be transported over the coaxial cableinfrastructure initially installed in studios to carry analog video. Next, HD-SDI wasto support high-definition video. Finally, DUAL link HD-SDI and 3G-SDIdoubled the bandwidth of HD-SDI to support 1080p (50 Hz and 60 Hz) and other videoformats requiring more bandwidth than HD-SDI provides.
上傳時(shí)間： 2013-10-08
上傳用戶：yjj631
WP369可擴(kuò)展式處理平臺-各種嵌入式系統(tǒng)的理想解決方案 ：Delivering unrivaled levels of system performance,flexibility, scalability, and integration to developers,Xilinx's architecture for a new Extensible Processing Platform is optimized for system power, cost, and size. Based on ARM's DUAL-core Cortex™-A9 MPCore processors and Xilinx’s 28 nm programmable logic,the Extensible Processing Platform takes a processor-centric approach by defining a comprehensive processor system implemented with standard design methods. This approach provides Software Developers a familiar programming environment within an optimized, full featured,powerful, yet low-cost, low-power processing platform.
標(biāo)簽： 369 WP 擴(kuò)展式 處理平臺
上傳時(shí)間： 2013-10-22
上傳用戶：685
This is the Xilinx DUAL Processor Reference Designs suite. The designs illustrate a few differentDUAL-core architectures based on the MicroBlaze™ and PowerPC™ processors. The designsillustrate various concepts described in the Xilinx White Paper WP262 titled, “DesigningMultiprocessor Systems in Platform Studio”. There are simple software applications includedwith the reference designs that show various forms of interaction between the two processors.
標(biāo)簽： XAPP 996 雙處理器 參考設(shè)計(jì)
上傳時(shí)間： 2013-10-29
上傳用戶：旭521
Abstract: This application note discusses a design for a phantom antenna power-supply system compatible with theDigital Satellite Equipment Control (DiSEqC) communication standard, using the MAX16948 automotive DUAL, highvoltageLDO/switch. The presented application circuit provides a remote antenna power supply and also enables onewaycommunication from the radio head unit to the remote antenna. This system architecture offers flexibility inDiSEqC tone-burst frequency choice (100Hz to 30kHz), enabling users the ability to select the best frequency for theirapplication.
標(biāo)簽： 數(shù)字衛(wèi)星 控制 兼容 供電系統(tǒng)設(shè)計(jì)
上傳時(shí)間： 2013-11-17
上傳用戶：fnhhs
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