-
一種基于ST62單片機的稱重顯示控制器A Weighing Display Controller Based on ST62 Single Chip Computer祛 FA(上海時博飛奧控制系統(tǒng)有限公司，上海201100)摘要在介紹了基于ST62單片機的基礎(chǔ)上，詳細描述了稱重顯控制器的硬件設(shè)計和軟件設(shè)計思路。該控制器結(jié)構(gòu)簡單、操作方便、抗擾能力強等優(yōu)點;具有較好的推廣應(yīng)用價值。關(guān)鍵詞稱重顯示控制儀ST62單片機硬件設(shè)計軟件設(shè)計Abstract Ont heb asiso fin torductiono fST 62s inglec hipc omputer,th ed esignc oncrptof h ardwarea nds oftwarefo rw eighingd isplayc ontorleris d escrbed.The controler Features simple structure, ease operation, powerful capability of anti-interference, etc.，it is wealth to be promoted into practicalapplicationsKeywords We妙噸display0 引言ST62s inglec hip Hardwared esign Softwaer design備 份 振 蕩器，振蕩器保護電路，上電復(fù)位及低壓檢測復(fù)稱 重 顯 示控制器是一種具有數(shù)字顯示、開關(guān)量輸出、定值控制和通信功能的以微機為操作核心的稱重控制裝置。它是電子衡器的重要基礎(chǔ)部件，直接影響電子衡器及電子稱重系統(tǒng)的功能和性能。與合適的傳感器及承重傳力復(fù)位系統(tǒng)組合可組成配料秤、料斗秤、定值秤、平臺秤、汽車秤等，廣泛應(yīng)用于電力、化工、建筑、冶金、交通運輸、食品、軍工等部門，是進行自動稱重配料控制和生產(chǎn)過程自動化必不可少的重要檢測、控制裝置。隨著 稱 重 計量自動化水平的提高，對稱重顯示控制器的要求也越來越高。為實現(xiàn)低漂移、高穩(wěn)定，本控制器采用低漂移、高增益放大器AD620和高分辨率的A/D轉(zhuǎn)換器CS5550。為提高穩(wěn)定性和可靠性，采用集成度高的、抗干擾能力強的ST62單片機。
標簽：
ST
62
單片機
稱重
上傳時間：
2013-10-29
上傳用戶：釣鰲牧馬
-
This application note covers the design considerations of a system using the performance
Features of the LogiCORE™ IP Advanced eXtensible Interface (AXI) Interconnect core. The
design focuses on high system throughput through the AXI Interconnect core with F
MAX
and
area optimizations in certain portions of the design.
The design uses five AXI video direct memory access (VDMA) engines to simultaneously move
10 streams (five transmit video streams and five receive video streams), each in 1920 x 1080p
format, 60 Hz refresh rate, and up to 32 data bits per pixel. Each VDMA is driven from a video
test pattern generator (TPG) with a video timing controller (VTC) block to set up the necessary
video timing signals. Data read by each AXI VDMA is sent to a common on-screen display
(OSD) core capable of multiplexing or overlaying multiple video streams to a single output video
stream. The output of the OSD core drives the DVI video display interface on the board.
Performance monitor blocks are added to capture performance data. All 10 video streams
moved by the AXI VDMA blocks are buffered through a shared DDR3 SDRAM memory and are
controlled by a MicroBlaze™ processor.
The reference system is targeted for the Virtex-6 XC6VLX240TFF1156-1 FPGA on the
Xilinx® ML605 Rev D evaluation board
標簽：
XAPP
740
AXI
互聯(lián)
上傳時間：
2013-11-14
上傳用戶：fdmpy
-
The LogiCORE™ GTP Wizard automates the task of creating HDL wrappers to configure the high-speed serial GTP transceivers in Virtex™-5 LXT and SXT devices. The menu-driven interface allows one or more GTP transceivers to be configured using pre-definedtemplates for popular industry standards, or from scratch, to support a wide variety of custom protocols.The Wizard produces a wrapper, an example design, and a testbench for rapid integration and verification of the serial interface with your custom function
Features• Creates customized HDL wrappers to configureVirtex-5 RocketIO™ GTP transceivers• Users can configure Virtex-5 GTP transceivers toconform to industry standard protocols usingpredefined templates, or tailor the templates forcustom protocols• Included protocol templates provide support for thefollowing specifications: Aurora, CPRI, FibreChannel 1x, Gigabit Ethernet, HD-SDI, OBSAI,OC3, OC12, OC48, PCI Express® (PCIe®), SATA,SATA II, and XAUI• Automatically configures analog settings• Each custom wrapper includes example design, testbench; and both implementation and simulation scripts
標簽：
Transceiver
Virtex
Wizar
GTP
上傳時間：
2013-10-23
上傳用戶：leyesome
-
This application note describes a reference system which illustrates how to build an embeddedPowerPC® system using the Xilinx 1-Gigabit Ethernet Media Access Controller processor core.This system has the PLB_Gemac configured to use Scatter/Gather Direct Memory Access andthe Serializer/Deserializer (SerDes) interface. This application note describes how to set up thespecific clocking structure required for the SerDes interface and the constraints to be added tothe UCF file. This reference system is complete with a standalone software application to testsome of the main Features of this core, including access to registers, DMA capabilities, transmitand receive in loopback mode. This reference system is targeted for the ML300 evaluationboard.
標簽：
SerDes
PLB
MAC
接口
上傳時間：
2013-11-01
上傳用戶：truth12
-
This document provides an overview of the MPC8313E PowerQUICC™II Pro processor Features, including a block diagram showing the major functional components.
標簽：
PowerQUICC
8313E
8313
MPC
上傳時間：
2013-11-20
上傳用戶：myworkpost
-
The C8051F020/1/2/3 devices are fully integrated mixed-signal System-on-a-Chip MCUs with 64 digital I/O pins (C8051F020/2) or 32 digital I/O pins (C8051F021/3). Highlighted Features are listed below; refer to Table 1.1 for specific product feature selection.
標簽：
C8051F020
數(shù)據(jù)手冊
上傳時間：
2013-11-08
上傳用戶：lwq11
-
The NCV7356 is a physical layer device for a single wire data linkcapable of operating with various Carrier Sense Multiple Accesswith Collision Resolution (CSMA/CR) protocols such as the BoschController Area Network (CAN) version 2.0. This serial data linknetwork is intended for use in applications where high data rate is notrequired and a lower data rate can achieve cost reductions in both thephysical media components and in the microprocessor and/ordedicated logic devices which use the network.The network shall be able to operate in either the normal data ratemode or a high-speed data download mode for assembly line andservice data transfer operations. The high-speed mode is onlyintended to be operational when the bus is attached to an off-boardservice node. This node shall provide temporary bus electrical loadswhich facilitate higher speed operation. Such temporary loads shouldbe removed when not performing download operations.The bit rate for normal communications is typically 33 kbit/s, forhigh-speed transmissions like described above a typical bit rate of83 kbit/s is recommended. The NCV7356 Features undervoltagelockout, timeout for faulty blocked input signals, output blankingtime in case of bus ringing and a very low sleep mode current.
標簽：
CANBUS
7356
NCV
單線
上傳時間：
2013-10-24
上傳用戶：s藍莓汁
-
The #1 Step-by-Step Guide to labviewNow Completely Updated for labview 8!
Master labview 8 with the industry's friendliest, most intuitive tutorial: labview for Everyone, Third Edition. Top labview experts Jeffrey Travis and Jim Kring teach labview the easy way: through carefully explained, step-by-step examples that give you reusable code for your own projects!
This brand-new Third Edition has been fully revamped and expanded to reflect new Features and techniques introduced in labview 8. You'll find two new chapters, plus dozens of new topics, including Project Explorer, AutoTool, XML, event-driven programming, error handling, regular expressions, polymorphic VIs, timed structures, advanced reporting, and much more. Certified labview Developer (CLD) candidates will find callouts linking to key objectives on NI's newest exam, making this book a more valuable study tool than ever.
Not just what to d why to do it!
Use labview to build your own virtual workbench
Master labview's foundations: wiring, creating, editing, and debugging VIs; using controls and indicators; working with data structures; and much more
Learn the "art" and best practices of effective labview development
NEW: Streamline development with labview Express VIs
NEW: Acquire data with NI-DAQmx and the labview DAQmx VIs
NEW: Discover design patterns for error handling, control structures, state machines, queued messaging, and more
NEW: Create sophisticated user interfaces with tree and tab controls, drag and drop, subpanels, and more
Whatever your application, whatever your role, whether you've used labview or not, labview for Everyone, Third Edition is the fastest, easiest way to get the results you're after!
標簽：
Everyone
LabVIEW
for
英文
上傳時間：
2013-10-14
上傳用戶：shawvi
-
Abstract: This application note illustrates the flexibility of the MAX7060 ASK/FSK transmitter. While the currently available evaluationkit (EV kit) has been optimized for the device's use in a specific frequency band (i.e., 288MHz to 390MHz), this document addresseshow the EV kit circuitry can be modified for improved operation at 433.92MHz, a frequency commonly used in Europe. Twoalternative match and filter configurations are presented: one for optimizing drain efficiency, the other for achieving higher transmitpower. Features and capabilities of earlier Maxim industrial, scientific, and medical radio-frequency (ISM-RF) transmitters areprovided, allowing comparison of the MAX7060 to its predecessors. Several design guidelines and cautions for using the MAX7060are discussed.
標簽：
ASK_FSK
7060
MAX
ISM
上傳時間：
2013-11-14
上傳用戶：swaylong
-
Multioutput monolithic regulators are easy to use and fi tinto spaces where multichip solutions cannot. Nevertheless,the popularity of multioutput regulators is temperedby a lack of options for input voltages above 30V andsupport of high output currents. The LT3692A fi lls thisgap with a dual monolithic regulator that operates frominputs up to 36V. It also includes a number of channeloptimization Features that allow the LT3692A’s per-channelperformance to rival that of multichip solutions.
標簽：
492
DN
降壓
溫度監(jiān)控
上傳時間：
2014-01-03
上傳用戶：Huge_Brother
