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Fire-Workflow-Engine-<b>All-In-One</b>

  • 抗干擾高穩(wěn)定性:VK2C23A/B I2C接口LCD控制顯示段碼屏驅(qū)動(dòng)IC

    產(chǎn)品型號(hào):VK2C23A/B 產(chǎn)品品牌:VINKA/永嘉微/永嘉微電 封裝形式:LQFP64/48 裸片:DICE(邦定COB)/COG(邦定玻璃用) 產(chǎn)品年份:新年份 聯(lián) 系 人:許碩  原廠直銷,工程服務(wù),技術(shù)支持,價(jià)格最具優(yōu)勢(shì)!QT394   VK2C23A/B概述: VK2C23A/B是一個(gè)點(diǎn)陣式存儲(chǔ)映射的LCD驅(qū)動(dòng)器,可支持最大224點(diǎn)(56SEGx4COM)或者最大416點(diǎn)(52SEGx8COM)的LCD屏。單片機(jī)可通過(guò)I2C接口配置顯示參數(shù)和讀寫(xiě)顯示數(shù)據(jù),也可通過(guò)指令進(jìn)入省電模式。其高抗干擾,低功耗的特性適用于水電氣表以及工控儀表類產(chǎn)品。 特點(diǎn): ★  工作電壓 2.4-5.5V ★  內(nèi)置32 kHz RC振蕩器 ★  偏置電壓(BIAS)可配置為1/3、1/4 ★  COM周期(DUTY)可配置為1/4、1/8 ★  內(nèi)置顯示RAM為56x4位、52x8位 ★  幀頻可配置為80Hz、160Hz ★  省電模式(通過(guò)關(guān)顯示和關(guān)振蕩器進(jìn)入)

    標(biāo)簽: VK2C I2C LCD 23 抗干擾 高穩(wěn)定 接口 控制 驅(qū)動(dòng)IC

    上傳時(shí)間: 2022-04-16

    上傳用戶:2937735731

  • Antennas: For All Applications(2nd Edition) by John D. Kraus

    ·JOHN DANIEL KRAUS: 94 DIED 18 July 2004 MEMBER GRADE Life Fellow EDUCATION Bachelors, masters, and doctorate-all in physics from the University of Michigan, Ann Arbor, USA FIELDS OF INTEREST Electroma

    標(biāo)簽: nbsp Applications Antennas Edition

    上傳時(shí)間: 2013-07-29

    上傳用戶:ukuk

  • 電源工程師-電路設(shè)計(jì)中的英雄

    Abstract: We don't expect manufacturers to produce clothes that in one size that fits everyone. In thesame way, one ESD component can't solve all issues—each application has different ESD requirements.Knowing that "one size fits all" cannot apply to power design, the power designer, or the engineering"super hero," must consider all the potential disruptions to a steady flow of power and thenvarious waysto mitigate them. This tutorial describes voltage- and current-limiting devices and risetime reducers tomanage the power. It also points to free and low-cost software tools to help design lowpass filters, checkcapacitor self-resonance, and simulate circuits.

    標(biāo)簽: 電源工程師 電路設(shè)計(jì)

    上傳時(shí)間: 2013-11-18

    上傳用戶:zhouxuepeng1

  • PL2303 USB to Serial Adapter

    The PL2303 USB to Serial adapter is your smart and convenient accessory forconnecting RS-232 serial devices to your USB-equipped Windows host computer. Itprovides a bridge connection with a standard DB 9-pin male serial port connector inone end and a standard Type-A USB plug connector on the other end. You simplyattach the serial device onto the serial port of the cable and plug the USB connectorinto your PC USB port. It allows a simple and easy way of adding serial connectionsto your PC without having to go thru inserting a serial card and traditional portconfiguration.This USB to Serial adapter is ideal for connecting modems, cellular phones, PDAs,digital cameras, card readers and other serial devices to your computer. It providesserial connections up to 1Mbps of data transfer rate. And since USB does not requireany IRQ resource, more devices can be attached to the system without the previoushassles of device and resource conflicts.Finally, the PL-2303 USB to Serial adapter is a fully USB Specification compliantdevice and therefore supports advanced power management such as suspend andresume operations as well as remote wakeup. The PL-2303 USB Serial cable adapteris designed to work on all Windows operating systems.

    標(biāo)簽: Adapter Serial 2303 USB

    上傳時(shí)間: 2013-11-01

    上傳用戶:ghostparker

  • 數(shù)字運(yùn)算

    數(shù)字運(yùn)算,判斷一個(gè)數(shù)是否接近素?cái)?shù) A Niven number is a number such that the sum of its digits divides itself. For example, 111 is a Niven number because the sum of its digits is 3, which divides 111. We can also specify a number in another base b, and a number in base b is a Niven number if the sum of its digits divides its value. Given b (2 <= b <= 10) and a number in base b, determine whether it is a Niven number or not. Input Each line of input contains the base b, followed by a string of digits representing a positive integer in that base. There are no leading zeroes. The input is terminated by a line consisting of 0 alone. Output For each case, print "yes" on a line if the given number is a Niven number, and "no" otherwise. Sample Input 10 111 2 110 10 123 6 1000 8 2314 0 Sample Output yes yes no yes no

    標(biāo)簽: 數(shù)字 運(yùn)算

    上傳時(shí)間: 2015-05-21

    上傳用戶:daguda

  • The book "The Finite Difference Time Domain for Electromagnetics" by Karl Kunz and Raymond Luebbers,

    The book "The Finite Difference Time Domain for Electromagnetics" by Karl Kunz and Raymond Luebbers, CRC Press, 1993, contains an FDTD code and output files in Appendix B. The same code and output files are contained in this directory.

    標(biāo)簽: Electromagnetics Difference The Luebbers

    上傳時(shí)間: 2013-12-29

    上傳用戶:chongcongying

  • /* * EULER S ALGORITHM 5.1 * * TO APPROXIMATE THE SOLUTION OF THE INITIAL VALUE PROBLEM: * Y = F

    /* * EULER S ALGORITHM 5.1 * * TO APPROXIMATE THE SOLUTION OF THE INITIAL VALUE PROBLEM: * Y = F(T,Y), A<=T<=B, Y(A) = ALPHA, * AT N+1 EQUALLY SPACED POINTS IN THE INTERVAL [A,B]. * * INPUT: ENDPOINTS A,B INITIAL CONDITION ALPHA INTEGER N. * * OUTPUT: APPROXIMATION W TO Y AT THE (N+1) VALUES OF T. */

    標(biāo)簽: APPROXIMATE ALGORITHM THE SOLUTION

    上傳時(shí)間: 2015-08-20

    上傳用戶:zhangliming420

  • Swfdec is a decoder/renderer for Macromedia Flash animations. The decoding and rendering engine is

    Swfdec is a decoder/renderer for Macromedia Flash animations. The decoding and rendering engine is provided in a library that can be used by other applications

    標(biāo)簽: Macromedia animations rendering decoding

    上傳時(shí)間: 2016-01-08

    上傳用戶:rocketrevenge

  • Top module name : SHIFTER (File name : SHIFTER.v) 2. Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGH

    Top module name : SHIFTER (File name : SHIFTER.v) 2. Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGHT. 3. Output pins: OUT [15:0]. 4. Input signals generated from test pattern are latched in one cycle and are synchronized at clock rising edge. 5. The SHIFT signal describes the shift number. The shift range is 0 to 15. 6. When the signal RIGHT is high, it shifts input data to right. On the other hand, it shifts input data to left. 7. When the signal SIGN is high, the input data is a signed number and it shifts with sign extension. However, the input data is an unsigned number if the signal SIGN is low. 8. You can only use following gates in Table I and need to include the delay information (Tplh, Tphl) in your design.

    標(biāo)簽: SHIFTER name module Input

    上傳時(shí)間: 2013-12-13

    上傳用戶:himbly

  • Top module name : SHIFTER (File name : SHIFTER.v) 2. Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGH

    Top module name : SHIFTER (File name : SHIFTER.v) 2. Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGHT. 3. Output pins: OUT [15:0]. 4. Input signals generated from test pattern are latched in one cycle and are synchronized at clock rising edge. 5. The SHIFT signal describes the shift number. The shift range is 0 to 15. 6. When the signal RIGHT is high, it shifts input data to right. On the other hand, it shifts input data to left. 7. When the signal SIGN is high, the input data is a signed number and it shifts with sign extension. However, the input data is an unsigned number if the signal SIGN is low. 8. You can only use following gates in Table I and need to include the delay information (Tplh, Tphl) in your design.

    標(biāo)簽: SHIFTER name module Input

    上傳時(shí)間: 2014-01-20

    上傳用戶:三人用菜

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