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protel 99se 使用技巧以及常見問題解決方法：里面有一些protel 99se 特別技巧，還有我們經(jīng)常遇到的一些問題！如何使一條走線至兩個(gè)不同位置零件的距離相同? 您可先在Design/Rule/High Speed/Matched Net Lengths的規(guī)則中來新增規(guī)則設(shè)定,最后再用Tools/EqualizeNet Lengths 來等長化即可。 Q02、在SCHLIB中造一零件其PIN的屬性，如何決定是Passive, Input, I/O, Hi- Z,Power,…..？在Help中能找到說明嗎？市面有關(guān) SIM？PLD？的書嗎？或貴公司有講義？ 你可在零件庫自制零件時(shí)點(diǎn)選零件Pin腳,并在Electrical Type里,可以自行設(shè)定PIN的 屬性,您可參考臺(tái)科大的Protel sch 99se 里面有介紹關(guān)于SIM的內(nèi)容。 Q03、請(qǐng)問各位業(yè)界前輩,如何能順利讀取pcad8.6版的線路圖,煩請(qǐng)告知 Protel 99SE只能讀取P-CAD 2000的ASCII檔案格式,所以你必須先將P-CAD8.6版的格式轉(zhuǎn)為P-CAD 2000的檔案格式,才能讓Protel讀取。 Q04、請(qǐng)問我該如何標(biāo)示線徑大小的那個(gè)平方呢 你可以將格點(diǎn)大小設(shè)小,還有將字形大小縮小,再放置數(shù)字的平方位置即可。 Q05、請(qǐng)問我一次如何更改所有組件的字型 您可以點(diǎn)選其中一個(gè)組件字型,再用Global的方法就可以達(dá)成你的要求。
上傳時(shí)間： 2015-01-01
上傳用戶：yxgi5
This document was developed under the Standard Hardware and Reliability Program (SHARP) TechnologyIndependent Representation of Electronic Products (TIREP) project. It is intended for use by VHSIC HardwareDescription Language (VHDL) design engineers and is offered as guidance for the development of VHDL modelswhich are compliant with the VHDL Data Item Description (DID DI-EGDS-80811) and which can be providedto manufacturing engineering personnel for the development of production data and the subsequent productionof hardware. Most VHDL modeling performed to date has been concentrated at either the component level orat the conceptual system level. The assembly and sub-assembly levels have been largely disregarded. Under theSHARP TIREP project, an attempt has been made to Help close this gap. The TIREP models are based upon lowcomplexity Standard Electronic Modules (SEM) of the format A configuration. Although these modules are quitesimple, it is felt that the lessons learned offer guidance which can readily be applied to a wide range of assemblytypes and complexities.
標(biāo)簽： Modelling Guide Navy VHDL
上傳時(shí)間： 2013-11-20
上傳用戶：pzw421125
This document provides practical, common guidelines for incorporating PCI Express interconnect layouts onto Printed Circuit Boards (PCB) ranging from 4-layer desktop baseboard designs to 10- layer or more server baseboard designs. Guidelines and constraints in this document are intended for use on both baseboard and add-in card PCB designs. This includes interconnects between PCI Express devices located on the same baseboard (chip-to-chip routing) and interconnects between a PCI Express device located “down” on the baseboard and a device located “up” on an add-in card attached through a connector. This document is intended to cover all major components of the physical interconnect including design guidelines for the PCB traces, vias and AC coupling capacitors, as well as add-in card edge-finger and connector considerations. The intent of the guidelines and examples is to Help ensure that good high-speed signal design practices are used and that the timing/jitter and loss/attenuation budgets can also be met from end-to-end across the PCI Express interconnect. However, while general physical guidelines and suggestions are given, they may not necessarily guarantee adequate performance of the interconnect for all layouts and implementations. Therefore, designers should consider modeling and simulation of the interconnect in order to ensure compliance to all applicable specifications. The document is composed of two main sections. The first section provides an overview of general topology and interconnect guidelines. The second section concentrates on physical layout constraints where bulleted items at the beginning of a topic highlight important constraints, while the narrative that follows offers additional insight.
標(biāo)簽： pci PCB 設(shè)計(jì)規(guī)范
上傳時(shí)間： 2014-01-24
上傳用戶：s363994250
Q01、如何使一條走線至兩個(gè)不同位置零件的距離相同? 您可先在Design/Rule/High Speed/Matched Net Lengths的規(guī)則中來新增規(guī)則設(shè)定,最 后再用Tools/EqualizeNet Lengths 來等長化即可。 Q02、在SCHLIB中造一零件其PIN的屬性，如何決定是Passive, Input, I/O, Hi- Z,Power,…..？在Help中能找到說明嗎？市面有關(guān) SIM？PLD？的書嗎？或貴公司有講義？ 你可在零件庫自制零件時(shí)點(diǎn)選零件Pin腳,并在Electrical Type里,可以自行設(shè)定PIN的 屬性,您可參考臺(tái)科大的Protel sch 99se 里 面有介紹關(guān)于SIM的內(nèi)容。 Q03、請(qǐng)問各位業(yè)界前輩,如何能順利讀取pcad8.6版的線路圖,煩請(qǐng)告知 Protel 99SE只能讀取P-CAD 2000的ASCII檔案格式,所以你必須先將P-CAD8.6版的格式 轉(zhuǎn)為P-CAD 2000的檔案格式,才能讓Protel讀取。
標(biāo)簽： Protel
上傳時(shí)間： 2013-11-07
上傳用戶：tangsiyun
multisim10.0仿真軟件破解版下載:【軟件介紹】 Multisim本是加拿大圖像交互技術(shù)公司（Interactive Image Technoligics簡稱IIT公司)推出的以Windows為基礎(chǔ)的仿真工具，被美國NI公司收購后，更名為NI Multisim ，而V10.0是其（即NI，National Instruments）最新推出的Multisim最新版本。 目前美國NI公司的EWB的包含有電路仿真設(shè)計(jì)的模塊Multisim、PCB設(shè)計(jì)軟件Ultiboard、布線引擎Ultiroute及通信電路分析與設(shè)計(jì)模塊Commsim 4個(gè)部分，能完成從電路的仿真設(shè)計(jì)到電路版圖生成的全過程。Multisim、Ultiboard、Ultiroute及Commsim 4個(gè)部分相互獨(dú)立，可以分別使用。Multisim、Ultiboard、Ultiroute及Commsim 4個(gè)部分有增強(qiáng)專業(yè)版（Power Professional）、專業(yè)版（Professional）、個(gè)人版（Personal）、教育版（Education）、學(xué)生版（Student）和演示版（Demo）等多個(gè)版本，各版本的功能和價(jià)格有著明顯的差異。 NI Multisim 10用軟件的方法虛擬電子與電工元器件，虛擬電子與電工儀器和儀表，實(shí)現(xiàn)了“軟件即元器件”、“軟件即儀器”。NI Multisim 10是一個(gè)原理電路設(shè)計(jì)、電路功能測試的虛擬仿真軟件。 NI Multisim 10的元器件庫提供數(shù)千種電路元器件供實(shí)驗(yàn)選用，同時(shí)也可以新建或擴(kuò)充已有的元器件庫，而且建庫所需的元器件參數(shù)可以從生產(chǎn)廠商的產(chǎn)品使用手冊(cè)中查到，因此也很方便的在工程設(shè)計(jì)中使用。 NI Multisim 10的虛擬測試儀器儀表種類齊全，有一般實(shí)驗(yàn)用的通用儀器，如萬用表、函數(shù)信號(hào)發(fā)生器、雙蹤示波器、直流電源；而且還有一般實(shí)驗(yàn)室少有或沒有的儀器，如波特圖儀、字信號(hào)發(fā)生器、邏輯分析儀、邏輯轉(zhuǎn)換器、失真儀、頻譜分析儀和網(wǎng)絡(luò)分析儀等。 NI Multisim 10具有較為詳細(xì)的電路分析功能，可以完成電路的瞬態(tài)分析和穩(wěn)態(tài)分析、 時(shí)域和頻域分析、器件的線性和非線性分析、電路的噪聲分析和失真分析、離散傅里葉分析、電路零極點(diǎn)分析、交直流靈敏度分析等電路分析方法，以幫助設(shè)計(jì)人員分析電路的性能。 NI Multisim 10可以設(shè)計(jì)、測試和演示各種電子電路，包括電工學(xué)、模擬電路、數(shù)字電路、射頻電路及微控制器和接口電路等。可以對(duì)被仿真的電路中的元器件設(shè)置各種故障，如開路、短路和不同程度的漏電等，從而觀察不同故障情況下的電路工作狀況。在進(jìn)行仿真的同時(shí)，軟件還可以存儲(chǔ)測試點(diǎn)的所有數(shù)據(jù)，列出被仿真電路的所有元器件清單，以及存儲(chǔ)測試儀器的工作狀態(tài)、顯示波形和具體數(shù)據(jù)等。 NI Multisim 10有豐富的Help功能，其Help系統(tǒng)不僅包括軟件本身的操作指南，更要的是包含有元器件的功能解說，Help中這種元器件功能解說有利于使用EWB進(jìn)行CAI教學(xué)。另外，NI Multisim10還提供了與國內(nèi)外流行的印刷電路板設(shè)計(jì)自動(dòng)化軟件Protel及電路仿真軟件PSpice之間的文件接口，也能通過Windows的剪貼板把電路圖送往文字處理系統(tǒng)中進(jìn)行編輯排版。支持VHDL和Verilog HDL語言的電路仿真與設(shè)計(jì)。 利用NI Multisim 10可以實(shí)現(xiàn)計(jì)算機(jī)仿真設(shè)計(jì)與虛擬實(shí)驗(yàn)，與傳統(tǒng)的電子電路設(shè)計(jì)與實(shí)驗(yàn)方法相比，具有如下特點(diǎn)：設(shè)計(jì)與實(shí)驗(yàn)可以同步進(jìn)行，可以邊設(shè)計(jì)邊實(shí)驗(yàn)，修改調(diào)試方便；設(shè)計(jì)和實(shí)驗(yàn)用的元器件及測試儀器儀表齊全，可以完成各種類型的電路設(shè)計(jì)與實(shí)驗(yàn)；可方便地對(duì)電路參數(shù)進(jìn)行測試和分析；可直接打印輸出實(shí)驗(yàn)數(shù)據(jù)、測試參數(shù)、曲線和電路原理圖；實(shí)驗(yàn)中不消耗實(shí)際的元器件，實(shí)驗(yàn)所需元器件的種類和數(shù)量不受限制，實(shí)驗(yàn)成本低，實(shí)驗(yàn)速度快，效率高；設(shè)計(jì)和實(shí)驗(yàn)成功的電路可以直接在產(chǎn)品中使用。 NI Multisim 10易學(xué)易用，便于電子信息、通信工程、自動(dòng)化、電氣控制類專業(yè)學(xué)生自學(xué)、便于開展綜合性的設(shè)計(jì)和實(shí)驗(yàn)，有利于培養(yǎng)綜合分析能力、開發(fā)和創(chuàng)新的能力。 multisim10.0激活碼及破解序列號(hào)
上傳時(shí)間： 2015-01-03
上傳用戶：daoyue
ADO.NET in a Nutshell is the most complete and concise source of ADO.NET information available. Besides being a valuable reference, this book covers a variety of issues that programmers face when developing web applications or web services that rely on database access. Most examples use Microsoft s C# language. The book s CD includes an add-in to integrate the reference with Visual Studio .NET Help files.
標(biāo)簽： information ADO NET available
上傳時(shí)間： 2015-01-11
上傳用戶：nanfeicui
MemCheck Driver Memory Tool The MemCheck code is designed to provide Windows NT/2K/XP driver developers with a tool to Help in the detection of the following memory handling issues: Buffer overrun Buffer corruption Buffer use after buffer release Double buffer releases
標(biāo)簽： MemCheck designed Windows develop
上傳時(shí)間： 2014-12-05
上傳用戶：weiwolkt
Demo程序經(jīng)Keil701編譯后，代碼量為7-8K，可直接在KeilC51上仿真運(yùn)行。 使用方法：解壓后雙擊yy項(xiàng)目，點(diǎn)調(diào)試即可在串口仿真看到結(jié)果。 Demo程序創(chuàng)建了3個(gè)任務(wù)A、B、C優(yōu)先級(jí)分別為2、3、4，A每秒顯示一次，B每3秒顯示一次，C每6秒顯示一次。從顯示結(jié)果看，顯示3個(gè)A后顯示1個(gè)B，顯示6個(gè)A和2個(gè)B后顯示1個(gè)C，結(jié)果顯然正確。用戶可以仿照范例運(yùn)用更多系統(tǒng)API函數(shù)寫出自己的程序。只要程序中有顯示語句就可以用軟件仿真器看結(jié)果。注意：系統(tǒng)提供的顯示函數(shù)是并發(fā)的，他不是直接顯示到串口，而是先輸出到顯存，用戶不必?fù)?dān)心IO慢速操作影響程序運(yùn)行。串口輸入也采用了同樣的技術(shù)，他使得用戶在CPU忙于處理其他任務(wù)時(shí)照樣可以盲打輸入命令。 將EXL2-shell目錄下的文件覆蓋yy目錄下的同名文件，將word.c、yyshell.c、yyshellsub.c、mystring.c加入項(xiàng)目，刪除yy1.c，編譯后調(diào)試即可。輸入Help可得到在線幫助，具體命令用法見文章說明。 yangye網(wǎng)友推薦http://www.sics.se/~adam/lwip/網(wǎng)站學(xué)習(xí)TCPIP，該網(wǎng)站開放源代碼的lwip是專為8bit和16bitMCU設(shè)計(jì)的TCPIP協(xié)議棧，已在多種CPU上移植成功，推薦大家下載。
上傳時(shí)間： 2014-11-01
上傳用戶：hopy
A simple utility to split a concatenated vCard format file into separate files (IETF RFC 2426 - vCard MIME Directory Profile). It splits on the BEGIN:VCARD and END:VCARD tags. It was created to Help import a Lotus Organizer export file into Palm Desktop
標(biāo)簽： concatenated separate utility simple
上傳時(shí)間： 2013-12-20
上傳用戶：gxf2016
Overview In this chapter I introduce Borland C++Builder (BCB) and explain what it is about. I also devote considerable time to explaining the purpose of this book and the philosophy behind my approach to technical writing. Technical subjects covered in this chapter include Creating a simple Multimedia RAD program that plays movies, WAV files, and MIDI files. Shutting down the BCB RAD programming tools and writing raw Windows API code instead. Creating components dynamically on the heap at runtime. Setting up event handlers (closures) dynamically at runtime. A brief introduction to using exceptions. This topic is covered in more depth in Chapter 5, "Exceptions." A brief introduction to ANSI strings. This subject is covered in more depth in Chapter 3, "C++Builder and the VCL." Using the online Help. Greping through the include and source files that come with the product and with this book.
標(biāo)簽： introduce Overview Borland Builder
上傳時(shí)間： 2014-01-04
上傳用戶：小鵬
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