Analog Inputs and Outputs in an S7 PLC are represented in the PLC as a 16-bit integer. Over the nominal span of the analog input or output, the value of this integer will range between - 27648 and +27648. However, it is easier to use the analog values if they are scaled to the same units and ranges as the process being controlled. This applications tip describes methods for scaling analog values to and from engineering units.
上傳時間： 2013-11-17
上傳用戶：3294322651
引言 在數字信息傳輸中，基帶數字信號通常要經過調制器調制，將頻率搬移到適合信息傳輸的頻段上。2FSK就是用數字信號去調制載波的頻率（移頻鍵控），由于它具有方法簡單、易于實現、抗噪聲和抗衰落性能較強等優點，因此在現代數字通信系統的低、中速數據傳輸中得到了廣泛應用。 直接數字頻率合成技術(DDS)將先進的數字處理技術與方法引入信號合成領域。DDS器件采用高速數字電路和高速D/A轉換技術，具備頻率轉換時間短、頻率分辨率高、頻率穩定度高、輸出信號頻率和相位可快速程控切換等優點，可以實現對信號的全數字式調制。
上傳時間： 2014-12-27
上傳用戶：1427796291
The PCA9555 is a 24-pin CMOS device that provides 16 bits of General Purpose parallelInput/Output (GPIO) expansion for I2C-bus/SMBus applications and was developed toenhance the NXP Semiconductors family of I2C-bus I/O expanders. The improvementsinclude higher drive capability, 5 V I/O tolerance, lower supply current, individual I/Oconfiguration, and smaller packaging. I/O expanders provide a simple solution whenadditional I/O is needed for ACPI power switches, sensors, push buttons, LEDs, fans, etc.The PCA9555 consists of two 8-bit Configuration (Input or Output selection); Input, Outputand Polarity Inversion (active HIGH or active LOW operation) registers. The systemmaster can enable the I/Os as either inputs or outputs by writing to the I/O configurationbits. The data for each Input or Output is kept in the corresponding Input or Outputregister. The polarity of the read register can be inverted with the Polarity Inversionregister. All registers can be read by the system master. Although pin-to-pin and I2C-busaddress compatible with the PCF8575, software changes are required due to theenhancements, and are discussed in Application Note AN469.
上傳時間： 2013-11-13
上傳用戶：fredguo
The PCA9557 is a silicon CMOS circuit which provides parallel input/output expansion for SMBus and I2C-bus applications. The PCA9557 consists of an 8-bit input port register, 8-bit output port register, and an I2C-bus/SMBus interface. It has low current consumption and a high-impedance open-drain output pin, IO0. The system master can enable the PCA9557’s I/O as either input or output by writing to the configuration register. The system master can also invert the PCA9557 inputs by writing to the active HIGH polarity inversion register. Finally, the system master can reset the PCA9557 in the event of a time-out by asserting a LOW in the reset input. The power-on reset puts the registers in their default state and initializes the I2C-bus/SMBus state machine. The RESET pin causes the same reset/initialization to occur without de-powering the part.
上傳時間： 2014-01-18
上傳用戶：bs2005
摘要: 串行傳輸技術具有更高的傳輸速率和更低的設計成本, 已成為業界首選, 被廣泛應用于高速通信領域。提出了一種新的高速串行傳輸接口的設計方案, 改進了Aurora 協議數據幀格式定義的弊端, 并采用高速串行收發器Rocket I/O, 實現數據率為2.5 Gbps的高速串行傳輸。關鍵詞: 高速串行傳輸; Rocket I/O; Aurora 協議 為促使FPGA 芯片與串行傳輸技術更好地結合以滿足市場需求, Xilinx 公司適時推出了內嵌高速串行收發器RocketI/O 的Virtex II Pro 系列FPGA 和可升級的小型鏈路層協議———Aurora 協議。Rocket I/O支持從622 Mbps 至3.125 Gbps的全雙工傳輸速率, 還具有8 B/10 B 編解碼、時鐘生成及恢復等功能, 可以理想地適用于芯片之間或背板的高速串行數據傳輸。Aurora 協議是為專有上層協議或行業標準的上層協議提供透明接口的第一款串行互連協議, 可用于高速線性通路之間的點到點串行數據傳輸, 同時其可擴展的帶寬, 為系統設計人員提供了所需要的靈活性[4]。但該協議幀格式的定義存在弊端,會導致系統資源的浪費。本文提出的設計方案可以改進Aurora 協議的固有缺陷,提高系統性能, 實現數據率為2.5 Gbps 的高速串行傳輸, 具有良好的可行性和廣闊的應用前景。
上傳時間： 2013-11-06
上傳用戶：smallfish
The NCV7356 is a physical layer device for a single wire data linkcapable of operating with various Carrier Sense Multiple Accesswith Collision Resolution (CSMA/CR) protocols such as the BoschController Area Network (CAN) version 2.0. This serial data linknetwork is intended for use in applications where high data rate is notrequired and a lower data rate can achieve cost reductions in both thephysical media components and in the microprocessor and/ordedicated logic devices which use the network.The network shall be able to operate in either the normal data ratemode or a high-speed data download mode for assembly line andservice data transfer operations. The high-speed mode is onlyintended to be operational when the bus is attached to an off-boardservice node. This node shall provide temporary bus electrical loadswhich facilitate higher speed operation. Such temporary loads shouldbe removed when not performing download operations.The bit rate for normal communications is typically 33 kbit/s, forhigh-speed transmissions like described above a typical bit rate of83 kbit/s is recommended. The NCV7356 features undervoltagelockout, timeout for faulty blocked input signals, output blankingtime in case of bus ringing and a very low sleep mode current.
上傳時間： 2013-10-24
上傳用戶：s藍莓汁
The LPC2292/2294 microcontrollers are based on a 16/32-bit ARM7TDMI-S CPU with real-time emulation and embedded trace support, together with 256 kB of embedded high-speed flash memory. A 128-bit wide memory interface and a unique accelerator architecture enable 32-bit code execution at the maximum clock rate. For critical code size applications, the alternative 16-bit Thumb mode reduces code by more than 30 pct with minimal performance penalty. With their 144-pin package, low power consumption, various 32-bit timers, 8-channel 10-bit ADC, 2/4 (LPC2294) advanced CAN channels, PWM channels and up to nine external interrupt pins these microcontrollers are particularly suitable for automotive and industrial control applications as well as medical systems and fault-tolerant maintenance buses. The number of available fast GPIOs ranges from 76 (with external memory) through 112 (single-chip). With a wide range of additional serial communications interfaces, they are also suited for communication gateways and protocol converters as well as many other general-purpose applications. Remark: Throughout the data sheet, the term LPC2292/2294 will apply to devices with and without the /00 or /01 suffix. The suffixes /00 and /01 will be used to differentiate from other devices only when necessary.
上傳時間： 2014-12-30
上傳用戶：aysyzxzm
Keil C51 V8 專業開發工具（PK51） PK51是為8051系列單片機所設計的開發工具，支持所有8051系列衍生產品，，支持帶擴展存儲器和擴展指令集（例如Dallas390/5240/400,Philips 51MX,Analog Devices MicroConverters）的新設備,以及支持很多公司的一流的設備和IP內核,比如Analog Devices, Atmel, Cypress Semiconductor, Dallas Semiconductor, Goal, Hynix, Infineon, Intel, NXP(founded by Philips), OKI, Silicon Labs,SMSC, STMicroeleectronics,Synopsis, TDK, Temic, Texas Instruments,Winbond等。 通過PK51專業級開發工具，可以輕松地了解8051的On-chip peripherals與及其它關鍵特性。 The PK51專業級開發工具包括… l μVision Ø 集成開發環境 Ø 調試器 Ø 軟件模擬器 l Keil 8051擴展編譯工具 Ø AX51宏匯編程序 Ø ANSI C編譯工具 Ø LX51 連接器 Ø OHX51 Object-HEX 轉換器 l Keil 8051編譯工具 Ø A51宏匯編程序 Ø C51 ANSI C編譯工具 Ø BL51 代碼庫連接器 Ø OHX51 Object-HEX 轉換器 Ø OC51 集合目標轉換器 l 目標調試器 Ø FlashMON51 目標監控器 Ø MON51目標監控器 Ø MON390 (Dallas 390)目標監控器 Ø MONADI (Analog Devices 812)目標監控器 Ø ISD51 在系統調試 l RTX51微實時內核 你應該考慮PK51開發工具包,如果你… l 需要用8051系列單片機來開發 l 需要開發 Dallas 390 或者 Philips 51MX代碼 l 需要用C編寫代碼 l 需要一個軟件模擬器或是沒有硬件仿真器 l 需要在單芯片上基于小實時內核創建復雜的應用
上傳時間： 2013-10-30
上傳用戶：yy_cn
多維多選擇背包問題(MMKP)是0-1背包問題的延伸，背包核已經被用來設計解決背包問題的高效算法。目的是研究如何獲得一種背包核，并以此高效處理多維多選擇背包問題。首先給出了一種方法確定MMKP的核，然后闡述了利用核精確解決MMKP問題的B&B算法，列出了具體的算法步驟。在分析了算法的存儲復雜度后，將算法在各種實例上的運行效果與目前解決MMKP問題的常用算法的運行效果進行了比較，發現本文的算法性能優于以往任何算法。
上傳時間： 2013-11-20
上傳用戶：wangw7689
摘要: 串行傳輸技術具有更高的傳輸速率和更低的設計成本, 已成為業界首選, 被廣泛應用于高速通信領域。提出了一種新的高速串行傳輸接口的設計方案, 改進了Aurora 協議數據幀格式定義的弊端, 并采用高速串行收發器Rocket I/O, 實現數據率為2.5 Gbps的高速串行傳輸。關鍵詞: 高速串行傳輸; Rocket I/O; Aurora 協議 為促使FPGA 芯片與串行傳輸技術更好地結合以滿足市場需求, Xilinx 公司適時推出了內嵌高速串行收發器RocketI/O 的Virtex II Pro 系列FPGA 和可升級的小型鏈路層協議———Aurora 協議。Rocket I/O支持從622 Mbps 至3.125 Gbps的全雙工傳輸速率, 還具有8 B/10 B 編解碼、時鐘生成及恢復等功能, 可以理想地適用于芯片之間或背板的高速串行數據傳輸。Aurora 協議是為專有上層協議或行業標準的上層協議提供透明接口的第一款串行互連協議, 可用于高速線性通路之間的點到點串行數據傳輸, 同時其可擴展的帶寬, 為系統設計人員提供了所需要的靈活性[4]。但該協議幀格式的定義存在弊端,會導致系統資源的浪費。本文提出的設計方案可以改進Aurora 協議的固有缺陷,提高系統性能, 實現數據率為2.5 Gbps 的高速串行傳輸, 具有良好的可行性和廣闊的應用前景。
上傳時間： 2013-10-13
上傳用戶：lml1234lml
