亚洲欧美第一页_禁久久精品乱码_粉嫩av一区二区三区免费野_久草精品视频

蟲蟲首頁| 資源下載| 資源專輯| 精品軟件
登錄| 注冊

It企業(yè)

  • it describe how to develop the field programmable gate array

    it describe how to develop the field programmable gate array

    標簽: programmable describe develop array

    上傳時間: 2013-08-28

    上傳用戶:zhaoq123

  • it consist of PCF8583 assembly driver

    it consist of PCF8583 assembly driver, Proteus RTC example that is schematic, Proteus library and model files

    標簽: assembly consist driver 8583

    上傳時間: 2013-09-25

    上傳用戶:1477849018@qq.com

  • x電容和y電容介紹

    X電容是指跨于L-N之間的電容器, Y電容是指跨于L-G/N-G之間的電容器。(L=Line, N=Neutral, G=Ground).

    標簽: 電容

    上傳時間: 2014-12-23

    上傳用戶:haohao

  • X電容和Y電容

    X電容和Y電容的使用及注意方法

    標簽: X電容 Y電容

    上傳時間: 2013-11-22

    上傳用戶:sevenbestfei

  • 介紹X,Y電容的通俗易懂的資料

    介紹X,Y電容的一片通俗易懂的資料

    標簽: 電容

    上傳時間: 2013-10-30

    上傳用戶:teddysha

  • MATLAB與PSpice數據接口技術

    摘 要 瞬態仿真領域的許多工作需要獲得可視化數據, 仿真電路不能將輸出參數繪制成圖形時研究工作將受到很大影響. 而權威電路仿真軟件PSpice 在這個方面不盡如人意. 本文提出了一種有效的解決辦法: 通過MATLAB 編程搭建一個PSpice 與MATLAB 的數據接口,使PSpice輸出數據文件可以導入到MATLAB中繪制圖形. 這令我們能夠很方便地獲得數據的規律以有效地分析仿真結果, 這項技術對于教學和工程實踐都有比較實際的幫助.關鍵詞: 瞬態仿真 仿真程序 PSpice MATLAB 可視化數據The Data Transfer from Pspice to MATLABWu hao Ning yuanzhong Liang yingAbstract Many works in the area of transient simulation has shown how a emulator such asPSpice can be interfaced to an control analysis package such as MATLAB to get viewdata. Thepaper describes how such interfaces can be made using the MATLAB programming. The platformas a typical platform will solve the problem that PSpice software sometimes can not draw the datato a picture. It can make us find the rule from numerous data very expediently, so we can analyzethe outcome of the simulation. And it also can be used in the field of education.Keywords Transient Simulation Emulator PSpice MATLAB Viewdata1 引言科學研究和工程應用常需要進行電路仿真 PSpice可進行直流 交流 瞬態等基本電路特性分析 也可進行蒙托卡諾 MC 統計分析 最壞情況 Wcase 分析 優化設計等復雜電路特性分析 它是國際上仿真電路的權威軟件 而MATLAB的主要特點有 高效方便的矩陣和數組運算 編程效率高 結構化面向對象 方便的繪圖功能 用戶使用方便 工具箱功能強大 兩者各有著重點 兩種軟件結合應用 對研究工作有很重要的意義香港理工大學Y. S. LEE 等人首先將PSpice和MATLAB結合 開發了電力電子電路優化用的CAD 程序MATSPICE[6] 將兩者相結合的關鍵在于 如何用MATLAB 獲取PSpice的仿真數據 對此參考文獻 6 里沒有詳細敘述 本文著重說明用MATLAB 讀取PSpice仿真數據的具體方法本論文利用MATLAB對PSpice仿真出的數據處理繪制出后者無法得到或是效果不好的仿真圖形 下面就兩者結合使用的例子 進行具體說明

    標簽: MATLAB PSpice 數據 接口技術

    上傳時間: 2013-10-20

    上傳用戶:wuchunzhong

  • Xilinx UltraScale:新一代架構滿足您的新一代架構需求(EN)

      中文版詳情瀏覽:http://www.elecfans.com/emb/fpga/20130715324029.html   Xilinx UltraScale:The Next-Generation Architecture for Your Next-Generation Architecture    The Xilinx® UltraScale™ architecture delivers unprecedented levels of integration and capability with ASIC-class system- level performance for the most demanding applications.   The UltraScale architecture is the industr y's f irst application of leading-edge ASIC architectural enhancements in an All Programmable architecture that scales from 20 nm planar through 16 nm FinFET technologies and beyond, in addition to scaling from monolithic through 3D ICs. Through analytical co-optimization with the X ilinx V ivado® Design Suite, the UltraScale architecture provides massive routing capacity while intelligently resolving typical bottlenecks in ways never before possible. This design synergy achieves greater than 90% utilization with no performance degradation.   Some of the UltraScale architecture breakthroughs include:   • Strategic placement (virtually anywhere on the die) of ASIC-like system clocks, reducing clock skew by up to 50%    • Latency-producing pipelining is virtually unnecessary in systems with massively parallel bus architecture, increasing system speed and capability   • Potential timing-closure problems and interconnect bottlenecks are eliminated, even in systems requiring 90% or more resource utilization   • 3D IC integration makes it possible to build larger devices one process generation ahead of the current industr y standard    • Greatly increased system performance, including multi-gigabit serial transceivers, I/O, and memor y bandwidth is available within even smaller system power budgets   • Greatly enhanced DSP and packet handling   The Xilinx UltraScale architecture opens up whole new dimensions for designers of ultra-high-capacity solutions.

    標簽: UltraScale Xilinx 架構

    上傳時間: 2013-11-13

    上傳用戶:瓦力瓦力hong

  • 基于塑料光纖的高壓隔離通信接口設計

     通過比較各種隔離數字通信的特點和應用范圍,指出塑料光纖在隔離數字通信中的優勢。使用已經標準化的TOSLINK接口,有利于節省硬件開發成本和簡化設計難度。給出了塑料光纖的硬件驅動電路,說明設計過程中的注意事項,對光收發模塊的電壓特性和頻率特性進行全面試驗,并給出SPI口使用塑料光纖隔離通信的典型應用電路圖。試驗結果表明,該設計可為電力現場、電力電子及儀器儀表的設計提供參考。 Abstract:  y comparing characteristics and applications area of various isolated digital communications, this article indicates advantages of plastic optical fiber in isolated digital communications. Using the standardized TOSLINK interface, it helps to control costs and difficulty in hardware development and design. Then it gives the hardware driver circuit of plastic optical fiber module, explains the noticed details in design process, gives results on the basis of the optical transceiver module voltage characteristics and frequency characteristics tests. Finally,it gives typical application circuit of the SPI communication port by using plastic optical fiber isolation .The results show that this design can be referenced for the power field, power electronics and instrumentation design.

    標簽: 塑料光纖 高壓隔離 通信 接口設計

    上傳時間: 2014-01-10

    上傳用戶:gundan

  • Xilinx UltraScale:新一代架構滿足您的新一代架構需求(EN)

      中文版詳情瀏覽:http://www.elecfans.com/emb/fpga/20130715324029.html   Xilinx UltraScale:The Next-Generation Architecture for Your Next-Generation Architecture    The Xilinx® UltraScale™ architecture delivers unprecedented levels of integration and capability with ASIC-class system- level performance for the most demanding applications.   The UltraScale architecture is the industr y's f irst application of leading-edge ASIC architectural enhancements in an All Programmable architecture that scales from 20 nm planar through 16 nm FinFET technologies and beyond, in addition to scaling from monolithic through 3D ICs. Through analytical co-optimization with the X ilinx V ivado® Design Suite, the UltraScale architecture provides massive routing capacity while intelligently resolving typical bottlenecks in ways never before possible. This design synergy achieves greater than 90% utilization with no performance degradation.   Some of the UltraScale architecture breakthroughs include:   • Strategic placement (virtually anywhere on the die) of ASIC-like system clocks, reducing clock skew by up to 50%    • Latency-producing pipelining is virtually unnecessary in systems with massively parallel bus architecture, increasing system speed and capability   • Potential timing-closure problems and interconnect bottlenecks are eliminated, even in systems requiring 90% or more resource utilization   • 3D IC integration makes it possible to build larger devices one process generation ahead of the current industr y standard    • Greatly increased system performance, including multi-gigabit serial transceivers, I/O, and memor y bandwidth is available within even smaller system power budgets   • Greatly enhanced DSP and packet handling   The Xilinx UltraScale architecture opens up whole new dimensions for designers of ultra-high-capacity solutions.

    標簽: UltraScale Xilinx 架構

    上傳時間: 2013-11-21

    上傳用戶:wxqman

  • 支持X/Y/Z Modem協議的傳輸文件的通訊程序

    支持X/Y/Z Modem協議的傳輸文件的通訊程序

    標簽: Modem 協議 傳輸 通訊程序

    上傳時間: 2015-01-03

    上傳用戶:xg262122

主站蜘蛛池模板: 英吉沙县| 会泽县| 呼和浩特市| 三明市| 南部县| 安新县| 雷波县| 驻马店市| 盐津县| 昌都县| 锦州市| 理塘县| 平原县| 江油市| 师宗县| 寻乌县| 海淀区| 曲麻莱县| 三台县| 安阳市| 黄大仙区| 黑水县| 岗巴县| 拜泉县| 三台县| 鸡东县| 伊川县| 阿克苏市| 青海省| 二连浩特市| 寿阳县| 海门市| 五常市| 长海县| 安宁市| 洛浦县| 聂荣县| 万源市| 高安市| 九龙坡区| 上高县|