現代的電子設計和芯片制造技術正在飛速發展，電子產品的復雜度、時鐘和總線頻率等等都呈快速上升趨勢，但系統的電壓卻不斷在減小，所有的這一切加上產品投放市場的時間要求給設計師帶來了前所未有的巨大壓力。要想保證產品的一次性成功就必須能預見設計中可能出現的各種問題，并及時給出合理的解決方案，對于高速的數字電路來說，最令人頭大的莫過于如何確保瞬時跳變的數字信號通過較長的一段傳輸線，還能完整地被接收，并保證良好的電磁兼容性，這就是目前頗受關注的信號完整性（SI）問題。本章就是圍繞信號完整性的問題，讓大家對高速電路有個基本的認識，并介紹一些相關的基本概念。 第一章 高速數字電路概述.....................................................................................51.1 何為高速電路...............................................................................................51.2 高速帶來的問題及設計流程剖析...............................................................61.3 相關的一些基本概念...................................................................................8第二章 傳輸線理論...............................................................................................122.1 分布式系統和集總電路.............................................................................122.2 傳輸線的RLCG 模型和電報方程...............................................................132.3 傳輸線的特征阻抗.....................................................................................142.3.1 特性阻抗的本質.................................................................................142.3.2 特征阻抗相關計算.............................................................................152.3.3 特性阻抗對信號完整性的影響.........................................................172.4 傳輸線電報方程及推導.............................................................................182.5 趨膚效應和集束效應.................................................................................232.6 信號的反射.................................................................................................252.6.1 反射機理和電報方程.........................................................................252.6.2 反射導致信號的失真問題.................................................................302.6.2.1 過沖和下沖.....................................................................................302.6.2.2 振蕩：.............................................................................................312.6.3 反射的抑制和匹配.............................................................................342.6.3.1 串行匹配.........................................................................................352.6.3.1 并行匹配.........................................................................................362.6.3.3 差分線的匹配.................................................................................392.6.3.4 多負載的匹配.................................................................................41第三章 串擾的分析...............................................................................................423.1 串擾的基本概念.........................................................................................423.2 前向串擾和后向串擾.................................................................................433.3 后向串擾的反射.........................................................................................463.4 后向串擾的飽和.........................................................................................463.5 共模和差模電流對串擾的影響.................................................................483.6 連接器的串擾問題.....................................................................................513.7 串擾的具體計算.........................................................................................543.8 避免串擾的措施.........................................................................................57第四章 EMI 抑制....................................................................................................604.1 EMI/EMC 的基本概念..................................................................................604.2 EMI 的產生..................................................................................................614.2.1 電壓瞬變.............................................................................................614.2.2 信號的回流.........................................................................................624.2.3 共模和差摸EMI ..................................................................................634.3 EMI 的控制..................................................................................................654.3.1 屏蔽.....................................................................................................654.3.1.1 電場屏蔽.........................................................................................654.3.1.2 磁場屏蔽.........................................................................................674.3.1.3 電磁場屏蔽.....................................................................................674.3.1.4 電磁屏蔽體和屏蔽效率.................................................................684.3.2 濾波.....................................................................................................714.3.2.1 去耦電容.........................................................................................714.3.2.3 磁性元件.........................................................................................734.3.3 接地.....................................................................................................744.4 PCB 設計中的EMI.......................................................................................754.4.1 傳輸線RLC 參數和EMI ........................................................................764.4.2 疊層設計抑制EMI ..............................................................................774.4.3 電容和接地過孔對回流的作用.........................................................784.4.4 布局和走線規則.................................................................................79第五章 電源完整性理論基礎...............................................................................825.1 電源噪聲的起因及危害.............................................................................825.2 電源阻抗設計.............................................................................................855.3 同步開關噪聲分析.....................................................................................875.3.1 芯片內部開關噪聲.............................................................................885.3.2 芯片外部開關噪聲.............................................................................895.3.3 等效電感衡量SSN ..............................................................................905.4 旁路電容的特性和應用.............................................................................925.4.1 電容的頻率特性.................................................................................935.4.3 電容的介質和封裝影響.....................................................................955.4.3 電容并聯特性及反諧振.....................................................................955.4.4 如何選擇電容.....................................................................................975.4.5 電容的擺放及Layout ........................................................................99第六章 系統時序.................................................................................................1006.1 普通時序系統...........................................................................................1006.1.1 時序參數的確定...............................................................................1016.1.2 時序約束條件...................................................................................1066.2 源同步時序系統.......................................................................................1086.2.1 源同步系統的基本結構...................................................................1096.2.2 源同步時序要求...............................................................................110第七章 IBIS 模型................................................................................................1137.1 IBIS 模型的由來...................................................................................... 1137.2 IBIS 與SPICE 的比較.............................................................................. 1137.3 IBIS 模型的構成...................................................................................... 1157.4 建立IBIS 模型......................................................................................... 1187.4 使用IBIS 模型......................................................................................... 1197.5 IBIS 相關工具及鏈接..............................................................................120第八章 高速設計理論在實際中的運用.............................................................1228.1 疊層設計方案...........................................................................................1228.2 過孔對信號傳輸的影響...........................................................................1278.3 一般布局規則...........................................................................................1298.4 接地技術...................................................................................................1308.5 PCB 走線策略............................................................................................134
標簽： 信號完整性
上傳時間： 2014-05-15
上傳用戶：dudu1210004
第一部分 信號完整性知識基礎.................................................................................5第一章 高速數字電路概述.....................................................................................51.1 何為高速電路...............................................................................................51.2 高速帶來的問題及設計流程剖析...............................................................61.3 相關的一些基本概念...................................................................................8第二章 傳輸線理論...............................................................................................122.1 分布式系統和集總電路.............................................................................122.2 傳輸線的RLCG 模型和電報方程...............................................................132.3 傳輸線的特征阻抗.....................................................................................142.3.1 特性阻抗的本質.................................................................................142.3.2 特征阻抗相關計算.............................................................................152.3.3 特性阻抗對信號完整性的影響.........................................................172.4 傳輸線電報方程及推導.............................................................................182.5 趨膚效應和集束效應.................................................................................232.6 信號的反射.................................................................................................252.6.1 反射機理和電報方程.........................................................................252.6.2 反射導致信號的失真問題.................................................................302.6.2.1 過沖和下沖.....................................................................................302.6.2.2 振蕩：.............................................................................................312.6.3 反射的抑制和匹配.............................................................................342.6.3.1 串行匹配.........................................................................................352.6.3.1 并行匹配.........................................................................................362.6.3.3 差分線的匹配.................................................................................392.6.3.4 多負載的匹配.................................................................................41第三章 串擾的分析...............................................................................................423.1 串擾的基本概念.........................................................................................423.2 前向串擾和后向串擾.................................................................................433.3 后向串擾的反射.........................................................................................463.4 后向串擾的飽和.........................................................................................463.5 共模和差模電流對串擾的影響.................................................................483.6 連接器的串擾問題.....................................................................................513.7 串擾的具體計算.........................................................................................543.8 避免串擾的措施.........................................................................................57第四章 EMI 抑制....................................................................................................604.1 EMI/EMC 的基本概念..................................................................................604.2 EMI 的產生..................................................................................................614.2.1 電壓瞬變.............................................................................................614.2.2 信號的回流.........................................................................................624.2.3 共模和差摸EMI ..................................................................................634.3 EMI 的控制..................................................................................................654.3.1 屏蔽.....................................................................................................654.3.1.1 電場屏蔽.........................................................................................654.3.1.2 磁場屏蔽.........................................................................................674.3.1.3 電磁場屏蔽.....................................................................................674.3.1.4 電磁屏蔽體和屏蔽效率.................................................................684.3.2 濾波.....................................................................................................714.3.2.1 去耦電容.........................................................................................714.3.2.3 磁性元件.........................................................................................734.3.3 接地.....................................................................................................744.4 PCB 設計中的EMI.......................................................................................754.4.1 傳輸線RLC 參數和EMI ........................................................................764.4.2 疊層設計抑制EMI ..............................................................................774.4.3 電容和接地過孔對回流的作用.........................................................784.4.4 布局和走線規則.................................................................................79第五章 電源完整性理論基礎...............................................................................825.1 電源噪聲的起因及危害.............................................................................825.2 電源阻抗設計.............................................................................................855.3 同步開關噪聲分析.....................................................................................875.3.1 芯片內部開關噪聲.............................................................................885.3.2 芯片外部開關噪聲.............................................................................895.3.3 等效電感衡量SSN ..............................................................................905.4 旁路電容的特性和應用.............................................................................925.4.1 電容的頻率特性.................................................................................935.4.3 電容的介質和封裝影響.....................................................................955.4.3 電容并聯特性及反諧振.....................................................................955.4.4 如何選擇電容.....................................................................................975.4.5 電容的擺放及Layout ........................................................................99第六章 系統時序.................................................................................................1006.1 普通時序系統...........................................................................................1006.1.1 時序參數的確定...............................................................................1016.1.2 時序約束條件...................................................................................1063.2 高速設計的問題.......................................................................................2093.3 SPECCTRAQuest SI Expert 的組件.......................................................2103.3.1 SPECCTRAQuest Model Integrity .................................................2103.3.2 SPECCTRAQuest Floorplanner/Editor .........................................2153.3.3 Constraint Manager .......................................................................2163.3.4 SigXplorer Expert Topology Development Environment .......2233.3.5 SigNoise 仿真子系統......................................................................2253.3.6 EMControl .........................................................................................2303.3.7 SPECCTRA Expert 自動布線器.......................................................2303.4 高速設計的大致流程...............................................................................2303.4.1 拓撲結構的探索...............................................................................2313.4.2 空間解決方案的探索.......................................................................2313.4.3 使用拓撲模板驅動設計...................................................................2313.4.4 時序驅動布局...................................................................................2323.4.5 以約束條件驅動設計.......................................................................2323.4.6 設計后分析.......................................................................................233第四章 SPECCTRAQUEST SIGNAL EXPLORER 的進階運用..........................................2344.1 SPECCTRAQuest Signal Explorer 的功能包括：................................2344.2 圖形化的拓撲結構探索...........................................................................2344.3 全面的信號完整性(Signal Integrity)分析.......................................2344.4 完全兼容 IBIS 模型...............................................................................2344.5 PCB 設計前和設計的拓撲結構提取.......................................................2354.6 仿真設置顧問...........................................................................................2354.7 改變設計的管理.......................................................................................2354.8 關鍵技術特點...........................................................................................2364.8.1 拓撲結構探索...................................................................................2364.8.2 SigWave 波形顯示器........................................................................2364.8.3 集成化的在線分析(Integration and In-process Analysis) .236第五章 部分特殊的運用...............................................................................2375.1 Script 指令的使用..................................................................................2375.2 差分信號的仿真.......................................................................................2435.3 眼圖模式的使用.......................................................................................249第四部分：HYPERLYNX 仿真工具使用指南............................................................251第一章 使用LINESIM 進行前仿真.......................................................................2511.1 用LineSim 進行仿真工作的基本方法...................................................2511.2 處理信號完整性原理圖的具體問題.......................................................2591.3 在LineSim 中如何對傳輸線進行設置...................................................2601.4 在LineSim 中模擬IC 元件.....................................................................2631.5 在LineSim 中進行串擾仿真...................................................................268第二章 使用BOARDSIM 進行后仿真......................................................................2732.1 用BOARDSIM 進行后仿真工作的基本方法...................................................2732.2 BoardSim 的進一步介紹..........................................................................2922.3 BoardSim 中的串擾仿真..........................................................................309
上傳時間： 2014-04-18
上傳用戶：wpt
Silicon Motion, Inc. has made best efforts to ensure that the information contained in this document is accurate andreliable. However, the information is subject to change without notice. No responsibility is assumed by SiliconMotion, Inc. for the use of this information, nor for infringements of patents or other rights of third parties.Copyright NoticeCopyright 2002, Silicon Motion, Inc. All rights reserved. No part of this publication may be reproduced, photocopied,or transmitted in any form, without the prior written consent of Silicon Motion, Inc. Silicon Motion, Inc. reserves theright to make changes to the product specification without reservation and without notice to our users
標簽： GUIDELINES Layout 320 PCB
上傳時間： 2014-12-24
上傳用戶：zhaistone
Integrated EMI/Thermal Design forSwitching Power SuppliesWei ZhangThesis submitted to the Faculty of theVirginia Polytechnic Institute and State Universityin partial fulfillment of the requirements for the degree of Integrated EMI/Thermal Design forSwitching Power SuppliesWei Zhang(ABSTRACT)This work presents the modeling and analysis of EMI and thermal performancefor switch power supply by using the CAD tools. The methodology and design guidelinesare developed.By using a boost PFC circuit as an example, an equivalent circuit model is builtfor EMI noise prediction and analysis. The parasitic elements of circuit Layout andcomponents are extracted analytically or by using CAD tools. Based on the model, circuitLayout and magnetic component design are modified to minimize circuit EMI. EMI filtercan be designed at an early stage without prototype implementation.In the second part, thermal analyses are conducted for the circuit by using thesoftware Flotherm, which includes the mechanism of conduction, convection andradiation. Thermal models are built for the components. Thermal performance of thecircuit and the temperature profile of components are predicted. Improved thermalmanagement and winding arrangement are investigated to reduce temperature.In the third part, several circuit Layouts and inductor design examples are checkedfrom both the EMI and thermal point of view. Insightful information is obtained.
上傳時間： 2013-11-10
上傳用戶：1595690
PCB Layout 基本規範項次 項目 備註1 一般PCB 過板方向定義： PCB 在SMT 生產方向為短邊過迴焊爐(Reflow), PCB 長邊為SMT 輸送帶夾持邊. PCB 在DIP 生產方向為I/O Port 朝前過波焊爐(Wave Solder), PCB 與I/O 垂直的兩邊為DIP 輸送帶夾持邊.1.1 金手指過板方向定義： SMT: 金手指邊與SMT 輸送帶夾持邊垂直. DIP: 金手指邊與DIP 輸送帶夾持邊一致.2 SMD 零件文字框外緣距SMT 輸送帶夾持邊L1 需≧150 mil. SMD 及DIP 零件文字框外緣距板邊L2 需≧100 mil.3 PCB I/O port 板邊的螺絲孔(精靈孔)PAD 至PCB 板邊, 不得有SMD 或DIP 零件(如右圖黃色區).PAD
上傳時間： 2014-12-24
上傳用戶：jokey075
|Introduction Basic Concept Tips to Layout Power circuit Type of Power circuit Basic Concept Maximum Current calculation Resistance of Copper ideal power supply & noise Capacitor & Inductor Power consumption Function of power circuit
上傳時間： 2014-01-04
上傳用戶：kao21
This document provides practical, common guidelines for incorporating PCI Express interconnect Layouts onto Printed Circuit Boards (PCB) ranging from 4-layer desktop baseboard designs to 10- layer or more server baseboard designs. Guidelines and constraints in this document are intended for use on both baseboard and add-in card PCB designs. This includes interconnects between PCI Express devices located on the same baseboard (chip-to-chip routing) and interconnects between a PCI Express device located “down” on the baseboard and a device located “up” on an add-in card attached through a connector. This document is intended to cover all major components of the physical interconnect including design guidelines for the PCB traces, vias and AC coupling capacitors, as well as add-in card edge-finger and connector considerations. The intent of the guidelines and examples is to help ensure that good high-speed signal design practices are used and that the timing/jitter and loss/attenuation budgets can also be met from end-to-end across the PCI Express interconnect. However, while general physical guidelines and suggestions are given, they may not necessarily guarantee adequate performance of the interconnect for all Layouts and implementations. Therefore, designers should consider modeling and simulation of the interconnect in order to ensure compliance to all applicable specifications. The document is composed of two main sections. The first section provides an overview of general topology and interconnect guidelines. The second section concentrates on physical Layout constraints where bulleted items at the beginning of a topic highlight important constraints, while the narrative that follows offers additional insight.
上傳時間： 2013-10-15
上傳用戶：busterman
We provide complete power solutions with a full lineup of power managementproducts. This brochure provides an overview of our high performance DC/DC switching regulatorcontrollers for applications including datacom, telecom, industrial, automotive, medical, avionicsand control systems. We make power design easier with our industry-leading field applicationengineering support; a broad selection of demonstration boards with schematics, Layout filesand parts lists; SwitcherCAD® software for simulation, application notes and comprehensivetechnical documentation.
上傳時間： 2013-10-15
上傳用戶：lz4v4
Advancements in board assembly, PCB Layout anddigital IC integration have produced a new generationof densely populated, high performance systems. Theboard-mounted point-of-load (POL) DC/DC power suppliesin these systems are subject to the same demandingsize, high power and performance requirements asother subsystems. The rigorous new POL demands aredifficult to meet with traditional controller or regulatorICs, or power modules.
上傳時間： 2014-12-24
上傳用戶：lbbyxmraon
Piezoelectric motors are used in digital cameras for autofocus,zooming and optical image stabilization. Theyare relatively small, lightweight and effi cient, but theyalso require a complicated driving scheme. Traditionally,this challenge has been met with the use ofseparatecircuits, including a step-up converter and an oversizedgeneric full-bridge drive IC. The resulting high componentcount and large board space are especially problematicin the design of cameras for ever shrinking cell phones.The LT®3572 solves these problems by combining astep-up regulator and a dual full-bridge driver in a 4mm× 4mm QFN package. Figure 1 shows a typical LT3572Piezo motor drive circuit. A step-up converter is usedto generate 30V from a low voltage power source suchas a Li-Ion battery or any input power source within thepart’s wide input voltage range of 2.7V to 10V. The highoutput voltage of the step-up converter, adjustable upto 40V, is available for the drivers at the VOUT pin. Thedrivers operate in a full-bridge fashion, where the OUTAand OUTB pins are the same polarity as the PWMA andPWMB pins, respectively, and the OUTA and OUTB pinsare inverted from PWMA and PWMB, respectively. Thestep-up converter and both Piezo drivers have their ownshutdown control. Figure 2 shows a typical Layout
上傳時間： 2013-11-18
上傳用戶：hulee
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