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Low-Complexity

  • 線性低壓差 (LDO) 穩壓器解決方案

    We offer a broad line of high performance low dropout (LDO) linear regulators with fasttransient response, excellent line and load regulation, and very wide input voltage rangefrom 0.9V to 100V. Output currents range from 20mA to 10A, with positive, negative andmultiple output versions available. Many devices offer output voltage operation <0.8V andsome feature operation as low as 0V, even with a single supply. Most are stable with ceramicoutput capacitors. LDO regulators can be applied in virtually any application.

    標簽: LDO 線性 低壓差 穩壓器

    上傳時間: 2013-11-15

    上傳用戶:努力努力再努力

  • 如何優化ISM無線電頻率(RF)系統

    Abstract: With industrial/scientific/medical (ISM) band radio frequency (RF) products, often times users are new to the structure of Maxim's low pin-count transmitters andfully integrated superheterodyne receivers. This tutorial provides simple steps that can be taken to get the best performance out of these transmitters and receivers whileproviding techniques to measure the overall capability of the design.

    標簽: ISM RF 無線電頻率

    上傳時間: 2013-11-02

    上傳用戶:yph853211

  • 克服了正交頻分復用(OFDM)和IEEE 1901.2智能電網通信的挑戰

    Abstract: While many questions still surround the creation and deployment of the smart grid, the need for a reliablecommunications infrastructure is indisputable. Developers of the IEEE 1901.2 standard identified difficult channel conditionscharacteristic of low-frequency powerline communications and implemented an orthogonal frequency division multiplexing (OFDM)architecture using advanced modulation and channel-coding techniques. This strategy helped to ensure a robust communicationsnetwork for the smart grid.

    標簽: 1901.2 OFDM IEEE 正交頻分復用

    上傳時間: 2013-10-18

    上傳用戶:myworkpost

  • 智能天線技術在基站中的應用

    為了能夠滿足基站易于選址、優質快速的建站要求和易維護、低成本、高可靠的運行要求,本文對以方艙來實現一體化結構基站做出一番探討。從系統設計的觀點闡述了移動通信高性能基站天線設計的幾個關鍵問題,介紹了智能天線技術在基站中的應用,并且用HFSS軟件仿真了一種新型的對稱陣子天線,該天線駐波比小于2的帶寬可以達到60%,具有良好的寬頻帶特性。 Abstract:  In order to meet the station construction requirement of easy site selection and fast base station, and meet the operational requirement of easy maintenance, low cost and high reliability, this paper discussed the unified architecture base station using shelter. Several key problems of high performance mobile communication base station antenna were illustrated from the view of system design, the application of smart antenna in base station was also introduced. And a novel dipole antenna was simulated by using HFSS, the VSWR of the antenna is less than 2, and the bandwidth was reach to 60%. So it has good broadband properties.

    標簽: 智能天線 基站 中的應用

    上傳時間: 2013-11-20

    上傳用戶:linlin

  • ZigBee無線傳感網絡的路由協議研究

     為滿足無線網絡技術具有低功耗、節點體積小、網絡容量大、網絡傳輸可靠等技術要求,設計了一種以MSP430單片機和CC2420射頻收發器組成的無線傳感節點。通過分析其節點組成,提出了ZigBee技術中的幾種網絡拓撲形式,并研究了ZigBee路由算法。針對不同的傳輸要求形式選用不同的網絡拓撲形式可以盡大可能地減少系統成本。同時針對不同網絡選用正確的ZigBee路由算法有效地減少了網絡能量消耗,提高了系統的可靠性。應用試驗表明,采用ZigBee方式通信可以提高傳輸速率且覆蓋范圍大,與傳統的有線通信方式相比可以節約40%左右的成本。 Abstract:  To improve the proposed technical requirements such as low-ower, small nodes, large capacity and reliable network transmission, wireless sensor nodes based on MSP430 MCU and CC2420 RF transceiver were designed. This paper provided network topology of ZigBee technology by analysing the component of the nodes and researched ZigBee routing algorithm. Aiming at different requirements of transmission mode to choose the different network topologies form can most likely reduce the system cost. And aiming at different network to choose the correct ZigBee routing algorithm can effectively reduced the network energy consumption and improved the reliability of the system. Results show that the communication which used ZigBee mode can improve the transmission rate, cover more area and reduce 40% cost compared with traditional wired communications mode.

    標簽: ZigBee 無線傳感網絡 協議研究 路由

    上傳時間: 2013-10-09

    上傳用戶:robter

  • UHF讀寫器設計中的FM0解碼技術

       針對UHF讀寫器設計中,在符合EPC Gen2標準的情況下,對標簽返回的高速數據進行正確解碼以達到正確讀取標簽的要求,提出了一種新的在ARM平臺下采用邊沿捕獲統計定時器數判斷數據的方法,并對FM0編碼進行解碼。與傳統的使用定時器定時采樣高低電平的FM0解碼方法相比,該解碼方法可以減少定時器定時誤差累積的影響;可以將捕獲定時器數中斷與數據判斷解碼相對分隔開,使得中斷對解碼影響很小,實現捕獲與解碼的同步。通過實驗表明,這種方法提高了解碼的效率,在160 Kb/s的接收速度下,讀取一張標簽的時間約為30次/s。 Abstract:  Aiming at the requirement of receiving correctly decoded data from the tag under high-speed communication which complied with EPC Gen2 standard in the design of UHF interrogator, the article introduced a new technology for FM0 decoding which counted the timer counter to judge data by using the edge interval of signal capture based on the ARM7 platform. Compared with the traditional FM0 decoding method which used the timer timed to sample the high and low level, the method could reduce the accumulation of timing error and could relatively separate capture timer interrupt and the data judgment for decoding, so that the disruption effect on the decoding was small and realizd synchronization of capture and decoding. Testing result shows that the method improves the efficiency of decoding, at 160 Kb/s receiving speed, the time of the interrogator to read a tag is about 30 times/s.

    標簽: UHF FM0 讀寫器 解碼技術

    上傳時間: 2013-11-10

    上傳用戶:liufei

  • 差分電路中單端及混合模式S-參數的使用

    Single-Ended and Differential S-Parameters Differential circuits have been important incommunication systems for many years. In the past,differential communication circuits operated at lowfrequencies, where they could be designed andanalyzed using lumped-element models andtechniques. With the frequency of operationincreasing beyond 1GHz, and above 1Gbps fordigital communications, this lumped-elementapproach is no longer valid, because the physicalsize of the circuit approaches the size of awavelength.Distributed models and analysis techniques are nowused instead of lumped-element techniques.Scattering parameters, or S-parameters, have beendeveloped for this purpose [1]. These S-parametersare defined for single-ended networks. S-parameterscan be used to describe differential networks, but astrict definition was not developed until Bockelmanand others addressed this issue [2]. Bockelman’swork also included a study on how to adapt single-ended S-parameters for use with differential circuits[2]. This adaptation, called “mixed-mode S-parameters,” addresses differential and common-mode operation, as well as the conversion betweenthe two modes of operation.This application note will explain the use of single-ended and mixed-mode S-parameters, and the basicconcepts of microwave measurement calibration.

    標簽: 差分電路 單端 模式

    上傳時間: 2014-03-25

    上傳用戶:yyyyyyyyyy

  • RT9018,RT9018AB-05 datasheet pdf

    The RT9018A/B is a high performance positive voltage regulator designed for use in applications requining very low Input voltage and very low dropout voltage at up to 3A(peak).

    標簽: 9018 datasheet RT

    上傳時間: 2013-10-10

    上傳用戶:geshaowei

  • LPC1850 Cortex-M3內核微控制器數據手冊

    The LPC1850/30/20/10 are ARM Cortex-M3 based microcontrollers for embeddedapplications. The ARM Cortex-M3 is a next generation core that offers systemenhancements such as low power consumption, enhanced debug features, and a highlevel of support block integration.The LPC1850/30/20/10 operate at CPU frequencies of up to 150 MHz. The ARMCortex-M3 CPU incorporates a 3-stage pipeline and uses a Harvard architecture withseparate local instruction and data buses as well as a third bus for peripherals. The ARMCortex-M3 CPU also includes an internal prefetch unit that supports speculativebranching.The LPC1850/30/20/10 include up to 200 kB of on-chip SRAM data memory, a quad SPIFlash Interface (SPIFI), a State Configuration Timer (SCT) subsystem, two High-speedUSB controllers, Ethernet, LCD, an external memory controller, and multiple digital andanalog peripherals.

    標簽: Cortex-M 1850 LPC 內核微控制器

    上傳時間: 2014-12-31

    上傳用戶:zhuoying119

  • LPC4300系列ARM雙核微控制器產品數據手冊

    The LPC4350/30/20/10 are ARM Cortex-M4 based microcontrollers for embeddedapplications. The ARM Cortex-M4 is a next generation core that offers systemenhancements such as low power consumption, enhanced debug features, and a highlevel of support block integration.The LPC4350/30/20/10 operate at CPU frequencies of up to 150 MHz. The ARMCortex-M4 CPU incorporates a 3-stage pipeline, uses a Harvard architecture withseparate local instruction and data buses as well as a third bus for peripherals, andincludes an internal prefetch unit that supports speculative branching. The ARMCortex-M4 supports single-cycle digital signal processing and SIMD instructions. Ahardware floating-point processor is integrated in the core.The LPC4350/30/20/10 include an ARM Cortex-M0 coprocessor, up to 264 kB of datamemory, advanced configurable peripherals such as the State Configurable Timer (SCT)and the Serial General Purpose I/O (SGPIO) interface, two High-speed USB controllers,Ethernet, LCD, an external memory controller, and multiple digital and analog peripherals

    標簽: 4300 LPC ARM 雙核微控制器

    上傳時間: 2013-10-28

    上傳用戶:15501536189

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