Top module name : SHIFTER (File name : SHIFTER.v) 2. Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGHT. 3. Output pins: OUT [15:0]. 4. Input signals generated from test pattern are latched in one cycle and are synchronized at clock rising edge. 5. The SHIFT signal describes the shift number. The shift range is 0 to 15. 6. When the signal RIGHT is high, it shifts input data to right. On the other hand, it shifts input data to left. 7. When the signal SIGN is high, the input data is a signed number and it shifts with sign extension. However, the input data is an unsigned number if the signal SIGN is low. 8. You can only use following gates in Table I and need to include the delay information (Tplh, Tphl) in your design.
標(biāo)簽： SHIFTER name module Input
上傳時(shí)間： 2013-12-13
上傳用戶(hù)：himbly
Top module name : SHIFTER (File name : SHIFTER.v) 2. Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGHT. 3. Output pins: OUT [15:0]. 4. Input signals generated from test pattern are latched in one cycle and are synchronized at clock rising edge. 5. The SHIFT signal describes the shift number. The shift range is 0 to 15. 6. When the signal RIGHT is high, it shifts input data to right. On the other hand, it shifts input data to left. 7. When the signal SIGN is high, the input data is a signed number and it shifts with sign extension. However, the input data is an unsigned number if the signal SIGN is low. 8. You can only use following gates in Table I and need to include the delay information (Tplh, Tphl) in your design.
標(biāo)簽： SHIFTER name module Input
上傳時(shí)間： 2014-01-20
上傳用戶(hù)：三人用菜
The MIPS32® 4KEm™ core from MIPS® Technologies is a member of the MIPS32 4KE™ processor core family. It is a high-performance, low-power, 32-bit MIPS RISC core designed for custom system-on-silicon applications. The core is designed for semiconductor manufacturing companies, ASIC developers, and system OEMs who want to rapidly integrate their own custom logic and peripherals with a high-performance RISC processor. It is highly portable across processes, and can be easily integrated into full system-on-silicon designs, allowing developers to focus their attention on end-user products. The 4KEm core is ideally positioned to support new products for emerging segments of the digital consumer, network, systems, and information management markets, enabling new tailored solutions for embedded applications.
標(biāo)簽： MIPS 8482 Technologies 174
上傳時(shí)間： 2014-12-22
上傳用戶(hù)：semi1981
MTOOLS version 2.0 Mtools is a public domain collection of programs to allow Unix systems to read, write, and manipulate files on an MSDOS filesystem (typically a diskette). The following MSDOS commands are emulated: Mtool MSDOS name equivalent Description ----- ---- ----------- mattrib ATTRIB change MSDOS file attribute flags mcd CD change MSDOS directory mcopy COPY copy MSDOS files to/from Unix mdel DEL/ERASE delete an MSDOS file mdir DIR display an MSDOS directory mformat FORMAT add MSDOS filesystem to a low-level format mlabel LABEL make an MSDOS volume label. mmd MD/MKDIR make an MSDOS subdirectory mrd RD/RMDIR remove an MSDOS subdirectory mread COPY low level read (copy) an MSDOS file to Unix mren REN/RENAME rename an existing MSDOS file mtype TYPE display contents of an MSDOS file mwrite COPY low level write (copy) a Unix file to MSDOS
標(biāo)簽： collection programs version systems
上傳時(shí)間： 2016-11-18
上傳用戶(hù)：wlcaption
The FM24C256/C256L/C256LZ devices are 256 Kbits CMOS nonvolatile electrically erasable memory. These devices offer the designer different low voltage and low power options. They conform to all requirements in the Extended IIC 2-wire protocol. Furthermore, they are designed to minimize device pin count and simplify PC board layout requirements.
標(biāo)簽： 256 electrically nonvolatile erasable
上傳時(shí)間： 2016-12-11
上傳用戶(hù)：lps11188
The TMS320LF240xA and TMS320LC240xA devices, new members of the TMS320C24x generation of digital signal processor (DSP) controllers, are part of the TMS320C2000 platform of fixed-point DSPs. The 240xA devices offer the enhanced TMS320 DSP architectural design of the C2xx core CPU for low-cost, low-power, and high-performance processing capabilities. Several advanced peripherals, optimized for digital motor and motion control applications, have been integrated to provide a true single-chip DSP controller. While code-compatible with the existing C24x DSP controller devices, the 240xA offers increased processing performance (40 MIPS) and a higher level of peripheral integration. See the TMS320x240xA Device Summary section for device-specific features.
標(biāo)簽： TMS 320 generation 240
上傳時(shí)間： 2013-12-16
上傳用戶(hù)：GavinNeko
The SL74HC573 is identical in pinout to the LS/ALS573. The device inputs are compatible with standard CMOS outputs with pullup resistors, they are compatible with LS/ALSTTL outputs. These latches appear transparent to data (i.e., the outputs change asynchronously) when Latch Enable is high. When Latch Enable goes low, data meeting the setup and hold time becomes latched.
標(biāo)簽： compatible The 573 identical
上傳時(shí)間： 2016-12-29
上傳用戶(hù)：變形金剛
Ultra wideband (UWB) technology, well-known for its use in ground penetrating radar, has also been of considerable interest in communications and radar applications demanding low probability of intercept and detection (LPI/D), multipath immunity, high data throughput, precision ranging and localization.
標(biāo)簽： penetrating technology well-known wideband
上傳時(shí)間： 2014-01-22
上傳用戶(hù)：edisonfather
Ultra wideband (UWB) technology, well-known for its use in ground penetrating radar, has also been of considerable interest in communications and radar applications demanding low probability of intercept and detection (LPI/D), multipath immunity, high data throughput, precision ranging and localization.
標(biāo)簽： penetrating technology well-known wideband
上傳時(shí)間： 2013-12-11
上傳用戶(hù)：aysyzxzm
The Cyclone® III PCI development board provides a hardware platform for developing and prototyping low-power, high-performance, logic-intensive PCI-based designs. The board provides a high-density of the memory to facilitate the design and development of FPGA designs which need huge memory storage, and also includes Low-Voltage Differential Signaling (LVDS) interface of the High-Speed Terasic Connectors (HSTCs) for extra high-speed interface application.
標(biāo)簽： development developing prototypi provides
上傳時(shí)間： 2017-01-29
上傳用戶(hù)：jjj0202
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