Top module name : SHIFTER (File name : SHIFTER.v) 2. Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGHT. 3. Output pins: OUT [15:0]. 4. Input signals generated from test pattern are latched in one cycle and are synchronized at clock rising edge. 5. The SHIFT signal describes the shift number. The shift range is 0 to 15. 6. When the signal RIGHT is high, it shifts input data to right. On the other hand, it shifts input data to left. 7. When the signal SIGN is high, the input data is a signed number and it shifts with sign extension. However, the input data is an unsigned number if the signal SIGN is low. 8. You can only use following gates in Table I and need to include the delay information (Tplh, Tphl) in your design.
標(biāo)簽： SHIFTER name module Input
上傳時(shí)間： 2013-12-13
上傳用戶(hù)：himbly
Top module name : SHIFTER (File name : SHIFTER.v) 2. Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGHT. 3. Output pins: OUT [15:0]. 4. Input signals generated from test pattern are latched in one cycle and are synchronized at clock rising edge. 5. The SHIFT signal describes the shift number. The shift range is 0 to 15. 6. When the signal RIGHT is high, it shifts input data to right. On the other hand, it shifts input data to left. 7. When the signal SIGN is high, the input data is a signed number and it shifts with sign extension. However, the input data is an unsigned number if the signal SIGN is low. 8. You can only use following gates in Table I and need to include the delay information (Tplh, Tphl) in your design.
標(biāo)簽： SHIFTER name module Input
上傳時(shí)間： 2014-01-20
上傳用戶(hù)：三人用菜
a Java program that reads in the following values from the standard input device (i.e. Keyboard) and writes its result on the standard output device (i.e. Console/Monitor): Inputs: A: the loan amount in dollars and cents (e.g. 150000.00). r: the net annual interest rate, expressed as an integer (e.g. 10 which means 10％) Y: the number of whole remaining years (for repayment) M: the number of remaining months Output: The program should calculate and output the amount of monthly repayments in dollars and cents as single value (e.g. $840.55)
標(biāo)簽： i.e. following the Keyboard
上傳時(shí)間： 2013-12-15
上傳用戶(hù)：米卡
Produce Java classes to calculate and display the Poisson probability when input the value of the average (A) arrival rate of customers at some business in the range of 1 to 10. The error message will output when A is out of the range。
標(biāo)簽： the probability calculate Produce
上傳時(shí)間： 2014-01-10
上傳用戶(hù)：moerwang
Flex chip implementation File: UP2FLEX JTAG jumper settings: down, down, up, up Input: Reset - FLEX_PB1 Input n - FLEX_SW switches 1 to 8 Output: Countdown - two 7-segment LEDs. Done light - decimal point on Digit1. Operation: Setup the binary input n number. Press the Reset switch. See the countdown from n down to 0 on the 7-segment LEDs. Done light lit when program terminates.
標(biāo)簽： down implementation settings UP2FLEX
上傳時(shí)間： 2014-01-21
上傳用戶(hù)：sclyutian
數(shù)值計(jì)算牛頓迭代法的matlab源程序 說(shuō)明如下： ％fun----input,the part as the form of f(x) in the equation f(x)=0 ％ ini----input,sets the starting point to ini ％ err----input,sets admissible error ％ sol----output,returns the root of equation
標(biāo)簽： the equation matlab input
上傳時(shí)間： 2014-01-12
上傳用戶(hù)：妄想演繹師
數(shù)值分析高斯——列主元消去法主程序 說(shuō)明如下： ％ a----input,matrix of coefficient ％ b----input,right vector ％ sol----output,returns the solution of linear equation
標(biāo)簽： input coefficient matrix vector
上傳時(shí)間： 2017-01-01
上傳用戶(hù)：dancnc
verilog code 4-bit carry look-ahead adder output [3:0] s //summation output cout //carryout input [3:0] i1 //input1 input [3:0] i2 //input2 input c0 //前一級(jí)進(jìn)位
標(biāo)簽： output look-ahead summation carryout
上傳時(shí)間： 2017-01-07
上傳用戶(hù)：yyq123456789
Overview Input Clock = 24Mhz Preview VGA 15fps @ 60Hz VGA 12.5fps @ 50Hz Capture VGA 15fps @ 60Hz VGA 12.5fps @ 50Hz Output Format YCbCr 4:2:2 (ITU 656) YCbCr to RGB conversion R = Y + (351*(Cr – 128)) >> 8 G = Y – (179*(Cr – 128) + 86*(Cb – 128))>>8 B = Y + (443*(Cb – 128)) >> 8
標(biāo)簽： VGA fps Overview Capture
上傳時(shí)間： 2013-12-24
上傳用戶(hù)：遠(yuǎn)遠(yuǎn)ssad
In this project we analyze and design the minimum mean-square error (MMSE) multiuser receiver for uniformly quantized synchronous code division multiple access (CDMA) signals in additive white Gaussian noise (AWGN) channels.This project is mainly based on the representation of uniform quantizer by gain plus additive noise model. Based on this model, we derive the weight vector and the output signal-to-interference ratio (SIR) of the MMSE receiver. The effects of quantization on the MMSE receiver performance is characterized in a single parameter named 鈥漞quivalent noise variance鈥? The optimal quantizer stepsize which maximizes the MMSE receiver output SNR is also determined.
標(biāo)簽： mean-square multiuser receiver project
上傳時(shí)間： 2014-11-21
上傳用戶(hù)：ywqaxiwang
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