height Mapping Original coder: Trent Polack
標簽： Original Mapping height Polack
上傳時間： 2017-08-08
上傳用戶：zm7516678
direct Mapping associative Mapping set associative Mapping
標簽： Mapping associative direct set
上傳時間： 2017-08-18
上傳用戶：lxm
高質量圖像圖形的生成基于光線跟蹤 High Quality Rendering Using Ray Tracing and Photon Mapping
標簽： Rendering Quality Mapping Tracing
上傳時間： 2013-12-22
上傳用戶：xauthu
Design Compiler Register Re-Mapping
標簽： Re-Mapping Compiler Register Design
上傳時間： 2019-04-03
上傳用戶：zsx097
Accurate pose estimation plays an important role in solution of simultaneous localization and Mapping (SLAM) problem, required for many robotic applications. This paper presents a new approach called R-SLAM, primarily to overcome systematic and non-systematic odometry errors which are generally caused by uneven floors, unexpected objects on the floor or wheel-slippage due to skidding or fast turns.The hybrid approach presented here combines the strengths of feature based and grid based methods to produce globally consistent high resolution maps within various types of environments.
標簽： localization environments challenging Resilient Mapping R-SLAM and in
上傳時間： 2019-09-15
上傳用戶：zhudx2007
HCS12微控制器MC9S12DP256 第一步： 1) HCS12 技術概述2) Operating Modes工作模式3) Resource Mapping資源映射4) External Bus Interface外部總線接口5) Port Integration Module端口集成模塊6) Background Debug Mode背景調試模塊
上傳時間： 2013-12-20
上傳用戶：源碼3
匯編器在微處理器的驗證和應用中舉足輕重，如何設計通用的匯編器一直是研究的熱點之一。本文提出了一種開放式的匯編器系統設計思想，在匯編語言與機器語言間插入中間代碼CMDL（code Mapping description language）語言，打破匯編語言與機器語言的直接映射關系，由此建立起一套描述匯編語言與機器語言的開放式映射體系。基于此開放式映射體系開發(fā)了一套匯編器系統，具有較高層次上的通用性和可移植性。【關鍵詞】指令集，CMDL，匯編器，開放式 Design of Retargetable Assembler System Liu Ling Feng Wen Nan Wang Ying Chun Jiang An Ping Ji Li Jiu IME of Peking University, 100871【摘要】An assembler plays a very important role in the field of microprocessor verifications and applications, thus how to build a retargetable assembler system has been a hotspot in this field for long time. This paper presents a new method about the retargetable assembler system design.It provides a kind of language CMDL, code Mapping description language. During the process of assembling, assembler languages are firstly translated to CMDL, and then mapped to the machine codes. In an other word, CMDL is inserted between assembler languages and machine codes during the translation procedure. As a medium code, CMDL has a lot of features, such as high extraction, strong descript capabilities. It can describe almost all attributes of assembler languages. By breaking the direct Mapping relationship between assembler languages and machine codes, the complexities of machine codes are hided to the users, therefore, the new retargetable assembler system has higher retargetable level by converting the Mapping from assembler languages and machine codes to assembler languages and CMDL, and implementationof it becomes easier. Based on the new Mapping system structure, a retargetable assemblersystem is developed. It proved the whole system has good retargetability and implantability.【關鍵詞】instruction set, symbol table, assembler, lexical analysis, retargetability
上傳時間： 2013-10-10
上傳用戶：meiguiweishi
在現代通信系統中，電話語音的頻帶被限制在300 Hz～4 kHz的范圍內，帶來了語音可懂度和自然度的降低。為了在不增加額外成本的前提下提高語音的可懂度和自然度，進行了電話語音頻帶擴展的研究。提出了一種改進的基于碼本映射的語音帶寬擴展算法：在碼本映射的過程中，使用加權系數來得到映射碼本。客觀測試結果表明，用此算法得到的寬帶語音的譜失真度比用一般的碼本映射降低至少2%。主觀測試結果表明，用此算法得到的寬帶語音具有更好的可懂度和自然度。 Abstract: In modern communication systems， the bandwidth of telephone speech is limited from 300Hz to 4 kHz， which reduces the intelligibility and naturalness of speech. Telephone speech bandwidth extension is researched to get wideband speech and to improve its intelligibility and naturalness， without increasing extra costs. This paper put forward an improved algorithm of speech bandwidth extension based on codebook Mapping. In the process of codebook Mapping， weighted coefficients were used to get Mapping codebook. Objective tests show that spectral distortion of wideband speech obtained by this algorithm reduces at least 2%， comparing to conditional codebook Mapping. Subjective tests show that the wideband speech obtained by this algorithm has better intelligibility and naturalness.
上傳時間： 2014-12-29
上傳用戶：15501536189
完整性高的FPGA-PCB系統化協同設計工具 Cadence OrCAD and Allegro FPGA System Planner便可滿足較復雜的設計及在設計初級產生最佳的I/O引腳規(guī)劃，并可透過FSP做系統化的設計規(guī)劃，同時整合logic、schematic、PCB同步規(guī)劃單個或多個FPGA pin的最佳化及l(fā)ayout placement，借由整合式的界面以減少重復在design及PCB Layout的測試及修正的過程及溝通時間，甚至透過最佳化的pin Mapping、placement后可節(jié)省更多的走線空間或疊構。 Specifying Design Intent 在FSP整合工具內可直接由零件庫選取要擺放的零件，而這些零件可直接使用PCB內的包裝，預先讓我們同步規(guī)劃FPGA設計及在PCB的placement。
標簽： Allegro Planner System FPGA
上傳時間： 2013-11-06
上傳用戶：wwwe
完整性高的FPGA-PCB系統化協同設計工具 Cadence OrCAD and Allegro FPGA System Planner便可滿足較復雜的設計及在設計初級產生最佳的I/O引腳規(guī)劃，并可透過FSP做系統化的設計規(guī)劃，同時整合logic、schematic、PCB同步規(guī)劃單個或多個FPGA pin的最佳化及l(fā)ayout placement，借由整合式的界面以減少重復在design及PCB Layout的測試及修正的過程及溝通時間，甚至透過最佳化的pin Mapping、placement后可節(jié)省更多的走線空間或疊構。 Specifying Design Intent 在FSP整合工具內可直接由零件庫選取要擺放的零件，而這些零件可直接使用PCB內的包裝，預先讓我們同步規(guī)劃FPGA設計及在PCB的placement。
標簽： Allegro Planner System FPGA
上傳時間： 2013-10-19
上傳用戶：shaojie2080
