Lab 2 – Synthesizable MATLAB
This lab exercise will explore the effects that different MATLAB coding styles have on hardware. The lab has two parts, each of which begins with a short introduction. This lab exercise is based on the simple MATLAB FIR filter model shown below:
This getting started exercise will guide you through the step-by-step process of transforming a MATLAB floating-point model into a hardware module that can be implemented in silicon (FPGA or ASIC). The design is a general purpose FIR filter taken from the AccelDSP Examples directory.
This lab exercise will introduce you to AccelDSP’s floating- to fixed-point conversion features. AccelDSP will automatically generate a fixed-point representation of a floating-point design. This process is controllable by using quantize directives.
