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  • This book enunciates and illustrates features and basic principles of C++. It is aimed at experienc

    This book enunciates and illustrates features and basic principles of C++. It is aimed at experienced C users who wish to learn C++. It can also be interesting for beginner C++ users who leaved Out some possibilities of the language.

    標簽: illustrates enunciates principles and

    上傳時間: 2014-02-16

    上傳用戶:aix008

  • FIFO電路(first in

    FIFO電路(first in,first Out),內部藏有16bit×16word的Dual port RAM,依次讀出已經寫入的數據。因為不存在Address輸入,所以請自行設計內藏的讀寫指針。由FIFO電路輸出的EF信號(表示RAM內部的數據為空)和FF信號(表示RAM內部的數據為滿)來表示RAM內部的狀態,并且控制FIFO的輸入信號WEN(寫使能)和REN(讀使能)。以及為了更好得控制FIFO電路,AEF(表示RAM內部的數據即將空)信號也同時輸出。

    標簽: first FIFO in 電路

    上傳時間: 2016-02-06

    上傳用戶:zhoujunzhen

  • 主要使用與C6000平臺下

    主要使用與C6000平臺下,可以通過網絡下載編譯器生成的.Out文件,不需要使用其它的工具對.Out文件進行加工后使用CCS工具進行下載目標代碼

    標簽: C6000

    上傳時間: 2016-02-12

    上傳用戶:nanxia

  • This device driver implements KMDF based virtual bus driver and generic virtual disk hosted on it. U

    This device driver implements KMDF based virtual bus driver and generic virtual disk hosted on it. Users can add virtual disks to Windows OS which are then seen and managed by OS as generic, regular disks. Virtual disks are plug in/Out with cmdln utility.

    標簽: virtual driver implements generic

    上傳時間: 2016-02-19

    上傳用戶:xiaoxiang

  • These templates are based on the documented Outlines from Tim Ryan s "The Anatomy of a Design Docum

    These templates are based on the documented Outlines from Tim Ryan s "The Anatomy of a Design Document" articles (published on Gamasutra). The filler text comes straight from the articles, and have been slightly edited for clarity (and to use the British spelling NMP). To read the articles (which I would highly suggest), check Out these links: http://www.gamasutra.com/features/19991019/ryan_01.htm -- Part 1 http://www.gamasutra.com/features/19991217/ryan_01.htm -- Part 2

    標簽: documented templates Outlines Anatomy

    上傳時間: 2014-01-02

    上傳用戶:13215175592

  • The first task at hand is to set up the endpoints appropriately for this example. The following code

    The first task at hand is to set up the endpoints appropriately for this example. The following code switches the CPU clock speed to 48 MHz (since at power-on default it is 12 MHz), and sets up EP2 as a Bulk Out endpoint, 4x buffered of size 512, and EP6 as a Bulk IN endpoint, also 4x buffered of size 512. This set-up utilizes the maximum allotted 4-KB FIFO space. It also sets up the FIFOs for manual mode, word-wide operation, and goes through a FIFO reset and arming sequence to ensure that they are ready for data operations

    標簽: appropriately The endpoints following

    上傳時間: 2013-12-02

    上傳用戶:dianxin61

  • 工具:Dynamips, VPCS 結點: R1: 10.0.0.0/8, 90.0.0.0/8 R2: 20.0.0.0/8, 90.0.0.0/8 S1: ethsw(以太網交換機) H

    工具:Dynamips, VPCS 結點: R1: 10.0.0.0/8, 90.0.0.0/8 R2: 20.0.0.0/8, 90.0.0.0/8 S1: ethsw(以太網交換機) H1: 10.0.0.2 H2: 20.0.0.2 H3: 10.0.0.3 要求: 在R1的E2/0上部署Out擴展ACL只禁止10.0.0.3訪問90.0.0.2 在R2的E0/0上部署Out標準ACL只禁止來自10.0.0.2的流量 在R2的E2/0上部署反身(reflexive)ACL 允許E2/0接口接收由20.0.0.0子網主動發起的返回流量 允許E2/0接口連接的其他網絡可以主動訪問R2自己 禁止其他流量

    標簽: Dynamips ethsw 90 VPCS

    上傳時間: 2016-03-10

    上傳用戶:heart520beat

  • 實驗十一 數/模轉換器 一、實驗目的 了解數/模轉換器的基本原理

    實驗十一 數/模轉換器 一、實驗目的 了解數/模轉換器的基本原理,掌握DAC0832芯片的使用方法。 二、實驗內容 1、實驗電路原理如圖11-1,DAC0832采用單緩沖方式,具有單雙極性輸入端(圖中的Ua、Ub),利用debug輸出命令(Out 290 數據)輸出數據 給DAC0832,用萬用表測量單極性輸出端Ua及雙極性輸出端Ub的電壓,驗證數字與電壓之間的線性關系。 2、編程產生以下波形(從Ub輸出,用示波器觀察) (1)正弦波 三、編程提示 1、8位D/A轉換器DAC0832的口地址為290H,輸入數據與輸出電壓的關系參考實驗指導原理圖: 2、產生鋸齒波只須將輸出到DAC0832的數據由0循環遞增。產生正弦波可根據正弦函數建一個下弦數字量表,取值范圍為一個周期,表中數 據個數在16個以上。

    標簽: 實驗 模轉換器

    上傳時間: 2013-12-16

    上傳用戶:colinal

  • 一、實驗目的 了解數/模轉換器的基本原理

    一、實驗目的 了解數/模轉換器的基本原理,掌握DAC0832芯片的使用方法。 二、實驗內容 1、實驗電路原理如圖36,DAC0832采用單緩沖方式,具有單雙極性輸入端(圖中的Ua、Ub),利用debug輸出命令(Out 290 數據)輸出數據給DAC0832,用萬用表測量單極性輸出端Ua及雙極性輸出端Ub的電壓,驗證數字與電壓之間的線性關系。 2、編程產生以下波形(從Ub輸出,用示波器觀察) (1)鋸齒波 三、編程提示 1、8位D/A轉換器DAC0832的口地址為290H,輸入數據與輸出電壓的關系為: (UREF表示參考電壓,N表示數數據),這里的參考電壓為PC機的+5V電源。 2、產生鋸齒波只須將輸出到DAC0832的數據由0循環遞增。

    標簽: 實驗 模轉換器

    上傳時間: 2016-03-12

    上傳用戶:ywqaxiwang

  • 基于OFDM的無線寬帶系統仿真It contains mainly two parts, i.e. link-level simulator and system-level simulator.

    基于OFDM的無線寬帶系統仿真It contains mainly two parts, i.e. link-level simulator and system-level simulator. Link-level simulator focus on a single-cell single-user scenario, where signal is transmitted from tx, and estimated at rx. Comparing the difference in tx/rx signal, the error rate can be found Out. The Output of the link-level simulator is the BLER/BER vs. SNR mapping table, that can be used for the system-level simulation. System-level simulator focus on a multi-cell multi-user scenario. For the sake of simplicity, it takes the mapping table aquired in the link-level simulation, measure the actural SNR, and finds the corresponding error rate.

    標簽: simulator i.e. system-level link-level

    上傳時間: 2016-03-15

    上傳用戶:xsnjzljj

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