The NCV7356 is a PHYsical layer device for a single wire data linkcapable of operating with various Carrier Sense Multiple Accesswith Collision Resolution (CSMA/CR) protocols such as the BoschController Area Network (CAN) version 2.0. This serial data linknetwork is intended for use in applications where high data rate is notrequired and a lower data rate can achieve cost reductions in both thePHYsical media components and in the microprocessor and/ordedicated logic devices which use the network.The network shall be able to operate in either the normal data ratemode or a high-speed data download mode for assembly line andservice data transfer operations. The high-speed mode is onlyintended to be operational when the bus is attached to an off-boardservice node. This node shall provide temporary bus electrical loadswhich facilitate higher speed operation. Such temporary loads shouldbe removed when not performing download operations.The bit rate for normal communications is typically 33 kbit/s, forhigh-speed transmissions like described above a typical bit rate of83 kbit/s is recommended. The NCV7356 features undervoltagelockout, timeout for faulty blocked input signals, output blankingtime in case of bus ringing and a very low sleep mode current.
上傳時間： 2013-10-24
上傳用戶：s藍莓汁
Single-Ended and Differential S-Parameters Differential circuits have been important incommunication systems for many years. In the past,differential communication circuits operated at lowfrequencies, where they could be designed andanalyzed using lumped-element models andtechniques. With the frequency of operationincreasing beyond 1GHz, and above 1Gbps fordigital communications, this lumped-elementapproach is no longer valid, because the PHYsicalsize of the circuit approaches the size of awavelength.Distributed models and analysis techniques are nowused instead of lumped-element techniques.Scattering parameters, or S-parameters, have beendeveloped for this purpose [1]. These S-parametersare defined for single-ended networks. S-parameterscan be used to describe differential networks, but astrict definition was not developed until Bockelmanand others addressed this issue [2]. Bockelman’swork also included a study on how to adapt single-ended S-parameters for use with differential circuits[2]. This adaptation, called “mixed-mode S-parameters,” addresses differential and common-mode operation, as well as the conversion betweenthe two modes of operation.This application note will explain the use of single-ended and mixed-mode S-parameters, and the basicconcepts of microwave measurement calibration.
上傳時間： 2014-03-25
上傳用戶：yyyyyyyyyy
ORCAD在使用的時候總會出現這樣或那樣的問題…但下這個問題比較奇怪…在ORCAD中無法輸出網表…彈出下面的錯誤….這種問題很是奇怪…Netlist Format: tango.dllDesign Name: D:\EDA_PROJECT\PROTEL99SE\YK\SV3200\MAIN.DSNERROR [NET0021] Cannot get part.[FMT0024] Ref-des not found. Possible Logical/PHYsical annotation conflict.[FMT0018] Errors processing intermediate file找了一天沒找到問題…終于在花了N多時間后發現問題所在…其實這個問題就是不要使用ORCAD PSPICE 庫里面的元件來畫電路圖…實際中我是用了PSPICE里面和自己制作的二種電阻和電容混合在一起…就會出現這種問題…
上傳時間： 2013-11-21
上傳用戶：zaocan888
The fundamental problem of communication is that of reproducing at one point either exactly or approximately a message selected at another point. Frequently the messages have meaning; that is they refer to or are correlated according to some system with certain PHYsical or conceptual entities.
標簽： 通信
上傳時間： 2013-11-11
上傳用戶：xy@1314
ORCAD在使用的時候總會出現這樣或那樣的問題…但下這個問題比較奇怪…在ORCAD中無法輸出網表…彈出下面的錯誤….這種問題很是奇怪…Netlist Format: tango.dllDesign Name: D:\EDA_PROJECT\PROTEL99SE\YK\SV3200\MAIN.DSNERROR [NET0021] Cannot get part.[FMT0024] Ref-des not found. Possible Logical/PHYsical annotation conflict.[FMT0018] Errors processing intermediate file找了一天沒找到問題…終于在花了N多時間后發現問題所在…其實這個問題就是不要使用ORCAD PSPICE 庫里面的元件來畫電路圖…實際中我是用了PSPICE里面和自己制作的二種電阻和電容混合在一起…就會出現這種問題…
上傳時間： 2013-11-02
上傳用戶：sz_hjbf
This document provides practical, common guidelines for incorporating PCI Express interconnect layouts onto Printed Circuit Boards (PCB) ranging from 4-layer desktop baseboard designs to 10- layer or more server baseboard designs. Guidelines and constraints in this document are intended for use on both baseboard and add-in card PCB designs. This includes interconnects between PCI Express devices located on the same baseboard (chip-to-chip routing) and interconnects between a PCI Express device located “down” on the baseboard and a device located “up” on an add-in card attached through a connector. This document is intended to cover all major components of the PHYsical interconnect including design guidelines for the PCB traces, vias and AC coupling capacitors, as well as add-in card edge-finger and connector considerations. The intent of the guidelines and examples is to help ensure that good high-speed signal design practices are used and that the timing/jitter and loss/attenuation budgets can also be met from end-to-end across the PCI Express interconnect. However, while general PHYsical guidelines and suggestions are given, they may not necessarily guarantee adequate performance of the interconnect for all layouts and implementations. Therefore, designers should consider modeling and simulation of the interconnect in order to ensure compliance to all applicable specifications. The document is composed of two main sections. The first section provides an overview of general topology and interconnect guidelines. The second section concentrates on PHYsical layout constraints where bulleted items at the beginning of a topic highlight important constraints, while the narrative that follows offers additional insight.
上傳時間： 2014-01-24
上傳用戶：s363994250
total是最后的版本。包括的全是最新的物理層和數據鏈路層。另外還有pro1和pro2的打包程序和調用它們形成的各自的界面程序，以及最后調用各個界面形成的總界面程序。由于時間匆忙，對數據鏈路層協議的界面化工作只做到了pro2，總界面上已經留了所有6個程序的地方。PHYsicalLayer包中包含了所有的物理層的程序的版本，以及它們各自的演示程序(一般為PHYsical)及打包程序(一般為PhyLayer)。顯示了整個物理層編寫及修改演化的過程，僅供參考。Datalink Layer包中包含了數據鏈路層程序的各個版本。包含數據鏈路層基本操作模塊(Datalink.java)及各個協議的版本(pro1-pro3)。以及它們各自的演示程序及打包程序。顯示了整個物理層編寫及修改演化的過程，僅供參考。運行方法：只需要Java的運行環境。先要預裝java，這里使用的是java的j2sdk-1_4_2_01-windows-i586版本。最新的1.5.0應該也支持。采用的編譯器是Jcreator，其他的編譯器也應該是可以用的。
上傳時間： 2013-12-19
上傳用戶：奇奇奔奔
Attributes, Constraints, and Carry Logic Overview Information for Mentor Customers Schematic Syntax UCF/NCF File Syntax Attributes/Logical Constraints Placement Constraints Relative Location (RLOC) Constraints Timing Constraints PHYsical Constraints Relationally Placed Macros (RPM) Carry Logic in XC4000 FPGAs Carry Logic in XC5200 FPGAs
標簽： Constraints Information Attributes Customers
上傳時間： 2015-05-12
上傳用戶：cc1015285075
Linux 虛擬網絡接口 實例 In the Linux (or Unix) world, most network interfaces, such as eth0 and ppp0, are associated with a PHYsical device that is in charge of transmitting and receiving data packets. However, some logical network interfaces don t feature any PHYsical packet transmission. The most well-known examples of these "virtual" interfaces are the shaper and eql interfaces.
標簽： Linux interfaces network world
上傳時間： 2014-01-11
上傳用戶：zhangzhenyu
Writing an Input Module The sample module introduced here is called idiom (Input Device for Intercepting Output of Mice), The sample module registers itself with the USB kernel subsystem as a mouse driver and with the input management subsystem as a keyboard driver. idiom translates mouse movement events into keyboard input events: it reports arrow events to the input system according to how the PHYsical mouse is moved.
標簽： Input introduced Writing Device
上傳時間： 2015-06-25
上傳用戶：731140412
