針對傳統(tǒng)集成電路(ASIC)功能固定、升級困難等缺點(diǎn),利用FPGA實(shí)現(xiàn)了擴(kuò)頻通信芯片STEL-2000A的核心功能。使用ISE提供的DDS IP核實(shí)現(xiàn)NCO模塊,在下變頻模塊調(diào)用了硬核乘法器并引入CIC濾波器進(jìn)行低通濾波,給出了DQPSK解調(diào)的原理和實(shí)現(xiàn)方法,推導(dǎo)出一種簡便的引入?仔/4固定相移的實(shí)現(xiàn)方法。采用模塊化的設(shè)計方法使用VHDL語言編寫出源程序,在Virtex-II Pro 開發(fā)板上成功實(shí)現(xiàn)了整個系統(tǒng)。測試結(jié)果表明該系統(tǒng)正確實(shí)現(xiàn)了STEL-2000A的核心功能。 Abstract: To overcome drawbacks of ASIC such as fixed functionality and upgrade difficulty, FPGA was used to realize the core functions of STEL-2000A. This paper used the DDS IP core PROVIDED by ISE to realize the NCO module, called hard core multiplier and implemented CIC filter in the down converter, described the principle and implementation detail of the demodulation of DQPSK, and derived a simple method to introduce a fixed phase shift of ?仔/4. The VHDL source code was designed by modularity method , and the complete system was successfully implemented on Virtex-II Pro development board. Test results indicate that this system successfully realize the core function of the STEL-2000A.
標(biāo)簽: STEL 2000 FPGA 擴(kuò)頻通信
上傳時間: 2013-11-06
上傳用戶:liu123
Abstract: This application note helps system designers choose the correct external components for use with the MAX16948 dualremote antenna LDO/switch, thus ensuring that automobile-regulated phantom antenna supply and output-current-monitoring circuitrymeet performance objectives. An electronic calculator is PROVIDED that helps specify the critical external components for theMAX16948, thus reducing design time. The calculator also determines the device's analog output voltage, output current-limitthreshold, and output current-sensing accuracies. The calculator includes new automatic Step By Step feature that assists designerswith component choice. To use the new automatic feature, click on the Step By Step button relative to the desired section.
上傳時間: 2013-11-04
上傳用戶:lhll918
為滿足無線網(wǎng)絡(luò)技術(shù)具有低功耗、節(jié)點(diǎn)體積小、網(wǎng)絡(luò)容量大、網(wǎng)絡(luò)傳輸可靠等技術(shù)要求,設(shè)計了一種以MSP430單片機(jī)和CC2420射頻收發(fā)器組成的無線傳感節(jié)點(diǎn)。通過分析其節(jié)點(diǎn)組成,提出了ZigBee技術(shù)中的幾種網(wǎng)絡(luò)拓?fù)湫问剑⒀芯苛薢igBee路由算法。針對不同的傳輸要求形式選用不同的網(wǎng)絡(luò)拓?fù)湫问娇梢员M大可能地減少系統(tǒng)成本。同時針對不同網(wǎng)絡(luò)選用正確的ZigBee路由算法有效地減少了網(wǎng)絡(luò)能量消耗,提高了系統(tǒng)的可靠性。應(yīng)用試驗(yàn)表明,采用ZigBee方式通信可以提高傳輸速率且覆蓋范圍大,與傳統(tǒng)的有線通信方式相比可以節(jié)約40%左右的成本。 Abstract: To improve the proposed technical requirements such as low-ower, small nodes, large capacity and reliable network transmission, wireless sensor nodes based on MSP430 MCU and CC2420 RF transceiver were designed. This paper PROVIDED network topology of ZigBee technology by analysing the component of the nodes and researched ZigBee routing algorithm. Aiming at different requirements of transmission mode to choose the different network topologies form can most likely reduce the system cost. And aiming at different network to choose the correct ZigBee routing algorithm can effectively reduced the network energy consumption and improved the reliability of the system. Results show that the communication which used ZigBee mode can improve the transmission rate, cover more area and reduce 40% cost compared with traditional wired communications mode.
標(biāo)簽: ZigBee 無線傳感網(wǎng)絡(luò) 協(xié)議研究 路由
上傳時間: 2013-10-09
上傳用戶:robter
Abstract: This application note explains how to layout the MAX20021/MAX20022 automotive quad powermanagementICs (PMICs) to maximize performance and minimize emissions. Example images of a fourlayerlayout are PROVIDED.
上傳時間: 2013-10-10
上傳用戶:dljwq
This application note shows how to achieve low-cost, efficient serial configuration for Spartan FPGA designs. The approachrecommended here takes advantage of unused resources in a design, thereby reducing the cost, part count, memory size,and board space associated with the serial configuration circuitry. As a result, neither processor nor PROM needs to be fullydedicated to performing Spartan configuration.In particular, information is PROVIDED on how the idle processing time of an on-board controller can be used to loadconfiguration data from an off-board source. As a result, it is possible to upgrade a Spartan design in the field by sending thebitstream over a network.
標(biāo)簽: Spartan XAPP FPGA 098
上傳時間: 2013-11-01
上傳用戶:wojiaohs
This Application Note covers the basics of how to use Verilog as applied to ComplexProgrammable Logic Devices. Various combinational logic circuit examples, such asmultiplexers, decoders, encoders, comparators and adders are PROVIDED. Synchronous logiccircuit examples, such as counters and state machines are also PROVIDED.
標(biāo)簽: Verilog XAPP CPLD 143
上傳時間: 2013-11-11
上傳用戶:y13567890
Xilinx is disclosing this user guide, manual, release note, and/or specification (the "Documentation") to you solely for use in the developmentof designs to operate with Xilinx hardware devices. You may not reproduce, distribute, republish, download, display, post, or transmit theDocumentation in any form or by any means including, but not limited to, electronic, mechanical, photocopying, recording, or otherwise,without the prior written consent of Xilinx. Xilinx expressly disclaims any liability arising out of your use of the Documentation. Xilinx reservesthe right, at its sole discretion, to change the Documentation without notice at any time. Xilinx assumes no obligation to correct any errorscontained in the Documentation, or to advise you of any corrections or updates. Xilinx expressly disclaims any liability in connection withtechnical support or assistance that may be PROVIDED to you in connection with the Information.
標(biāo)簽: Virtex FPGA PCB 設(shè)計手冊
上傳時間: 2013-11-11
上傳用戶:zwei41
Xilinx is disclosing this user guide, manual, release note, and/or specification (the “Documentation”) to you solely for use in the development of designs to operate with Xilinx hardware devices. You may not reproduce, distribute, republish, download, display, post, or transmit the Documentation in any form or by any means including, but not limited to, electronic, mechanical, photocopying, recording, or otherwise, without the prior written consent of Xilinx. Xilinx expressly disclaims any liability arising out of your use of the Documentation. Xilinx reserves the right, at its sole discretion, to change the Documentation without notice at any time. Xilinx assumes no obligation to correct any errors contained in the Documentation, or to advise you of any corrections or updates. Xilinx expressly disclaims any liability in connection with technical support or assistance that may be PROVIDED to you in connection with the Information.
標(biāo)簽: CPLD
上傳時間: 2014-12-05
上傳用戶:qazxsw
針對傳統(tǒng)集成電路(ASIC)功能固定、升級困難等缺點(diǎn),利用FPGA實(shí)現(xiàn)了擴(kuò)頻通信芯片STEL-2000A的核心功能。使用ISE提供的DDS IP核實(shí)現(xiàn)NCO模塊,在下變頻模塊調(diào)用了硬核乘法器并引入CIC濾波器進(jìn)行低通濾波,給出了DQPSK解調(diào)的原理和實(shí)現(xiàn)方法,推導(dǎo)出一種簡便的引入?仔/4固定相移的實(shí)現(xiàn)方法。采用模塊化的設(shè)計方法使用VHDL語言編寫出源程序,在Virtex-II Pro 開發(fā)板上成功實(shí)現(xiàn)了整個系統(tǒng)。測試結(jié)果表明該系統(tǒng)正確實(shí)現(xiàn)了STEL-2000A的核心功能。 Abstract: To overcome drawbacks of ASIC such as fixed functionality and upgrade difficulty, FPGA was used to realize the core functions of STEL-2000A. This paper used the DDS IP core PROVIDED by ISE to realize the NCO module, called hard core multiplier and implemented CIC filter in the down converter, described the principle and implementation detail of the demodulation of DQPSK, and derived a simple method to introduce a fixed phase shift of ?仔/4. The VHDL source code was designed by modularity method , and the complete system was successfully implemented on Virtex-II Pro development board. Test results indicate that this system successfully realize the core function of the STEL-2000A.
標(biāo)簽: STEL 2000 FPGA 擴(kuò)頻通信
上傳時間: 2013-11-19
上傳用戶:neu_liyan
Abstract: This application note explains how to design an intelligent lighting controller that senses and measures the ambient lightlevel with an ambient light sensor (ALS). Equipped with a real-time clock (RTC), the controller also knows when to turn lighting on oroff at specified times. The system presented in this document can be used to control all luminaires that are mains-supply operated.Controller software is also PROVIDED in hex format.
標(biāo)簽: 智能照明控制器 測量 環(huán)境光線
上傳時間: 2013-11-18
上傳用戶:AbuGe
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