The P89LPC912/913/914 are single-chip microcontrollers in low-cost 14-Pin packages, based on a high performance processor architecture that executes instructions in two to four clocks, six times the rate of standard 80C51 devices. Many system level functions have been incorporated into the P89LPC912/913/914 in order to reduce component count, board space, and system cost.
HIGH SPEED 8051 μC CORE
- Pipe-lined Instruction Architecture; Executes 70% of Instructions in 1 or 2
System Clocks
- Up to 25MIPS Throughput with 25MHz System Clock
- 22 Vectored Interrupt Sources
MEMORY
- 4352 Bytes Internal Data RAM (256 + 4k)
- 64k Bytes In-System Programmable FLASH Program Memory
- External Parallel Data Memory Interface – up to 5Mbytes/sec
DIGITAL PERIPHERALS
- 64 Port I/O; All are 5V tolerant
- Hardware SMBusTM (I2CTM Compatible), SPITM, and Two UART Serial
Ports Available Concurrently
- Programmable 16-bit Counter/Timer Array with 5 Capture/Compare
Modules
- 5 General Purpose 16-bit Counter/Timers
- Dedicated Watch-Dog Timer; Bi-directional Reset
CLOCK SOURCES
- Internal Programmable Oscillator: 2-to-16MHz
- External Oscillator: Crystal, RC, C, or Clock
- Real-Time Clock Mode using Timer 3 or PCA
SUPPLY VOLTAGE ........................ 2.7V to 3.6V
- Typical Operating Current: 10mA @ 25MHz
- Multiple Power Saving Sleep and Shutdown Modes
100-Pin TQFP (64-Pin Version Available)
Temperature Range: –40°C to +85°C
MG3500SoC是支持H.264高清編解碼器的片上系統，內部集成一個嵌入式ARM926處理器，支持高清H.264編解碼、MPEG鄄2解碼和JPEG編解碼。介紹了MG3500SoC的主要性能特點、引腳排列、主要接口功能及在DVR上的應用，以及MG3500SoC及其周圍器件的硬件設計，提出了在設計中應注意的問題。
Abstract:
The MG3500System-on-Chip（SoC）is high definition（HD）H.264codec,including ARM926-EJ processor，H.264encoder/decoder，MPEG2decoder and JPEG/MJPEG encoder/decoder.The features,Pin assignments，interfaces and the typical application of MG3500in DVR are introduced in this paper.The application hardware circuit between the MG3500SoC and peripheral device are given,the questions which the syetem design needs to pay attention are explained.
The CAT93C46 is a 1 kb Serial EEPROM memory device which isconfigured as either 64 registers of 16 bits (ORG Pin at VCC) or 128registers of 8 bits (ORG Pin at GND). Each register can be written (orread) serially by using the DI (or DO) Pin. The CAT93C46 features aself−timed internal write with auto−clear. On−chip Power−On Resetcircuit protects the internal logic against powering up in the wrongstate.
The MSP-FET430PIF is a Parallel Port interface (does not include target board) that is used to program and debug MSP430 FET tools and test boards through the JTAG interface. This interface is included in our FET tools, but sold without the development board. This interface uses a Parallel PC Port to communicate to the Debugger Software (IAR Kickstart software included) running on the PC. The interface uses the standard 14 Pin header to communicate to the MSP430 device using the standard JTAG protocol.
The flash memory can be erased and programmed in seconds with only a few keystrokes, and since the MSP430 flash is extremely low power, no external power supply is required. The tool has an integrated software environment and connects directly to the PC which greatly simplifies the set-up and use of the tool. The flash development tool supports development with all MSP430 flash parts.
Features
MSP430 debugging interface to connect a MSP430-Flash-device to a Parallel port on a PC
Supports JTAG debug protocol (NO support for Spy-Bi-Wire (2-wire JTAG) debug protocol, Spy-Bi-Wire (2-wire JTAG) is supported by MSP-FET430UIF)
Parallel Port cable and a 14-conductor target cable
Full documentation on CD ROM
Integrated IAR Kickstart user interface which includes:
Assembler
Linker
Limulator
Source-level debugger
Limited C-compiler
Technical specifications:
Backwardly compatable with existing FET tool boards.
The MSP-FET430U14 is a powerful flash emulation tool to quickly begin application development on the MSP430 MCU. It includes USB debugging interface used to program and debug the MSP430 in-system through the JTAG interface or the Pin saving Spy Bi-Wire (2-wire JTAG) protocol. The flash memory can be erased and programmed in seconds with only a few keystrokes, and since the MSP430 flash is ultra-low power, no external power supply is required.
The debugging tool interfaces the MSP430 to the included integrated software environment and includes code to start your design immediately. The MSP-FET430UIF development tools supports development with all MSP430 flash devices
IntroductionAs chip designers pack more functions into ICs,Pin counts continue to grow and the space betweenPins keeps shrinking. Pin spacings of 0.5 mm and0.65 mm are not at all uncommon. The power ofthese new ICs is wonderful, to be sure, but trou-bleshooting them can be a chore because connect-ing scopes and logic analyzers has become muchmore difficult and less dependable.
The PCA9536 is an 8-Pin CMOS device that provides 4 bits of General Purpose parallel
Input/Output (GPIO) expansion for I2C-bus/SMBus applications and was developed to
enhance the NXP Semiconductors family of I2C-bus I/O expanders. I/O expanders provide
a simple solution when additional I/O is needed for ACPI power switches, sensors,
push buttons, LEDs, fans, etc.
The PCA9534 is a 16-Pin CMOS device that provide 8 bits of General Purpose parallel
Input/Output (GPIO) expansion for I2C-bus/SMBus applications and was developed to
enhance the NXP Semiconductors family of I2C-bus I/O expanders. The improvements
include higher drive capability, 5 V I/O tolerance, lower supply current, individual I/O
configuration, 400 kHz clock frequency, and smaller packaging. I/O expanders provide a
simple solution when additional I/O is needed for ACPI power switches, sensors,
push buttons, LEDs, fans, etc.
