Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY) SPECIFICATIONs-High speed Physical Layer in the 5 GHZ Band
標(biāo)簽： SPECIFICATIONs-High Wireless Physical Control
上傳時(shí)間： 2013-12-18
上傳用戶(hù)：jkhjkh1982
This product has been manufactured to your company’s specifications a part for use in your company’s general electronic products. It is guaranteed to perform according to delivery specifications. For any other use apart from general electronic equipment, we cannot take responsibility if the product is used in medical devices, nuclear power control equipment, aerospace equipment, fire and security systems, or any other applications in which there is a direct risk to human life and where extremely high levels of reliability are required. If the product is to be used in any of the above applications, we will need to enter into a separate product liability agreement.
標(biāo)簽： company your specifications manufactured
上傳時(shí)間： 2017-02-19
上傳用戶(hù)：haohaoxuexi
資料->【E】光盤(pán)論文->【E1】斯坦福博士論文->03 California PhD High integrity GPS-INS filter for precise relative navigation.pdf
標(biāo)簽： California navigation integrity relative
上傳時(shí)間： 2013-07-03
上傳用戶(hù)：jiiszha
FPGA-based high-order FIR filter design
標(biāo)簽： FPGA-based high-order filter design
上傳時(shí)間： 2013-08-06
上傳用戶(hù)：sssnaxie
Introduce High-Speed Digital System Design.
標(biāo)簽： High-Speed Digital Design System
上傳時(shí)間： 2013-10-20
上傳用戶(hù)：gps6888
This document provides practical, common guidelines for incorporating PCI Express interconnect layouts onto Printed Circuit Boards (PCB) ranging from 4-layer desktop baseboard designs to 10- layer or more server baseboard designs. Guidelines and constraints in this document are intended for use on both baseboard and add-in card PCB designs. This includes interconnects between PCI Express devices located on the same baseboard (chip-to-chip routing) and interconnects between a PCI Express device located “down” on the baseboard and a device located “up” on an add-in card attached through a connector. This document is intended to cover all major components of the physical interconnect including design guidelines for the PCB traces, vias and AC coupling capacitors, as well as add-in card edge-finger and connector considerations. The intent of the guidelines and examples is to help ensure that good high-speed signal design practices are used and that the timing/jitter and loss/attenuation budgets can also be met from end-to-end across the PCI Express interconnect. However, while general physical guidelines and suggestions are given, they may not necessarily guarantee adequate performance of the interconnect for all layouts and implementations. Therefore, designers should consider modeling and simulation of the interconnect in order to ensure compliance to all applicable specifications. The document is composed of two main sections. The first section provides an overview of general topology and interconnect guidelines. The second section concentrates on physical layout constraints where bulleted items at the beginning of a topic highlight important constraints, while the narrative that follows offers additional insight.
標(biāo)簽： pci PCB 設(shè)計(jì)規(guī)范
上傳時(shí)間： 2013-10-15
上傳用戶(hù)：busterman
Abstract: Electrolytic capacitors are notorious for short lifetimes in high-temperature applications such asLED light bulbs. The careful selection of these devices with proper interpretation of their specifications isessential to ensure that they do not compromise the life of the end product. This application notediscusses this problem with electrolytic capacitors in LED light bulbs and provides an analysis that showshow it is possible to use electrolytics in such products.
上傳時(shí)間： 2013-11-17
上傳用戶(hù)：asdfasdfd
Achieving High Power Density Designs
標(biāo)簽： Achieving Density Designs Power
上傳時(shí)間： 2013-10-12
上傳用戶(hù)：qazxsw
The TJA1042 is a high-speed CAN transceiver that provides an interface between aController Area Network (CAN) protocol controller and the physical two-wire CAN bus.The transceiver is designed for high-speed (up to 1 Mbit/s) CAN applications in theautomotive industry, providing the differential transmit and receive capability to (amicrocontroller with) a CAN protocol controller.
標(biāo)簽： High-speed transce 1042 TJA
上傳時(shí)間： 2014-12-28
上傳用戶(hù)：氣溫達(dá)上千萬(wàn)的
The TJA1051 is a high-speed CAN transceiver that provides an interface between aController Area Network (CAN) protocol controller and the physical two-wire CAN bus.The transceiver is designed for high-speed (up to 1 Mbit/s) CAN applications in theautomotive industry, providing differential transmit and receive capability to (amicrocontroller with) a CAN protocol controller.
標(biāo)簽： High-speed transce 1051 TJA
上傳時(shí)間： 2013-10-17
上傳用戶(hù)：jisujeke
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