在研究傳統家用燃氣報警器的基礎上，以ZigBee協議為平臺，構建mesh網狀網絡實現網絡化的智能語音報警系統。由于傳感器本身的溫度和實際環境溫度的影響，傳感器標定后采用軟件補償方法。為了減少系統費用，前端節點采用半功能節點設備，路由器和協調器采用全功能節點設備，構建mesh網絡所形成的家庭內部報警系統，通過通用的電話接口連接到外部的公用電話網絡，啟動語音模塊進行報警。實驗結果表明，在2.4 GHz頻率下傳輸，有墻等障礙物的情況下，節點的傳輸距離大約為35 m，能夠滿足家庭需要，且系統工作穩定，但在功耗方面仍需進一步改善。 Abstract: On the basis of studying traditional household gas alarm system, this paper proposed the platform for the ZigBee protocol，and constructed mesh network to achieve network-based intelligent voice alarm system. Because of the sensor temperature and the actual environment temperature, this system design used software compensation after calibrating sensor. In order to reduce system cost, semi-functional node devices were used as front-end node, however, full-function devices were used as routers and coordinator，constructed alarm system within the family by building mesh network，connected to the external public telephone network through the common telephone interface, started the voice alarm module. The results indicate that nodes transmit about 35m in the distance in case of walls and other obstacles by 2.4GHz frequency transmission, this is able to meet family needs and work steadily, but still needs further improvement in power consumption.
上傳時間： 2013-10-30
上傳用戶：swaylong
通過比較各種隔離數字通信的特點和應用范圍，指出塑料光纖在隔離數字通信中的優勢。使用已經標準化的TOSLINK接口，有利于節省硬件開發成本和簡化設計難度。給出了塑料光纖的硬件驅動電路，說明設計過程中的注意事項，對光收發模塊的電壓特性和頻率特性進行全面試驗，并給出SPI口使用塑料光纖隔離通信的典型應用電路圖。試驗結果表明，該設計可為電力現場、電力電子及儀器儀表的設計提供參考。 Abstract: y comparing characteristics and applications area of various isolated digital communications， this article indicates advantages of plastic optical fiber in isolated digital communications. Using the standardized TOSLINK interface， it helps to control costs and difficulty in hardware development and design. Then it gives the hardware driver circuit of plastic optical fiber module， explains the noticed details in design process， gives results on the basis of the optical transceiver module voltage characteristics and frequency characteristics tests. Finally，it gives typical application circuit of the SPI communication port by using plastic optical fiber isolation .The results show that this design can be referenced for the power field， power electronics and instrumentation design.
上傳時間： 2014-01-10
上傳用戶：gundan
資料介紹說明 orcad到power格式Dxdesigner轉換器下載，為綠色免安裝版，下載后雙擊schcvt.exe，即可使用了，界面如下圖所示
標簽： Dxdesigner orcad power 轉換器
上傳時間： 2013-11-01
上傳用戶：xinyuzhiqiwuwu
Trademarks: Trademarks and service marks of Cadence Design Systems, Inc. (Cadence) contained in
標簽： Allegro-Design-Editor-Tutorial_ad e_tut
上傳時間： 2013-11-11
上傳用戶：yulg
中文版詳情瀏覽：http://www.elecfans.com/emb/fpga/20130715324029.html Xilinx UltraScale:The Next-Generation Architecture for Your Next-Generation Architecture The Xilinx® UltraScale™ architecture delivers unprecedented levels of integration and capability with ASIC-class system- level performance for the most demanding applications. The UltraScale architecture is the industr y's f irst application of leading-edge ASIC architectural enhancements in an All Programmable architecture that scales from 20 nm planar through 16 nm FinFET technologies and beyond, in addition to scaling from monolithic through 3D ICs. Through analytical co-optimization with the X ilinx V ivado® Design Suite, the UltraScale architecture provides massive routing capacity while intelligently resolving typical bottlenecks in ways never before possible. This design synergy achieves greater than 90% utilization with no performance degradation. Some of the UltraScale architecture breakthroughs include: • Strategic placement (virtually anywhere on the die) of ASIC-like system clocks, reducing clock skew by up to 50% • Latency-producing pipelining is virtually unnecessary in systems with massively parallel bus architecture, increasing system speed and capability • Potential timing-closure problems and interconnect bottlenecks are eliminated, even in systems requiring 90% or more resource utilization • 3D IC integration makes it possible to build larger devices one process generation ahead of the current industr y standard • Greatly increased system performance, including multi-gigabit serial transceivers, I/O, and memor y bandwidth is available within even smaller system power budgets • Greatly enhanced DSP and packet handling The Xilinx UltraScale architecture opens up whole new dimensions for designers of ultra-high-capacity solutions.
標簽： UltraScale Xilinx 架構
上傳時間： 2013-11-21
上傳用戶：wxqman
Abstract: Using a wafer-level package (WLP) can reduce the overall size and cost of your solution.However when using a WLP IC, the printed circuit board (PCB) layout can become more complex and, ifnot carefully planned, result in an unreliable design. This article presents some PCB designconsiderations and general recommendations for choosing a 0.4mm- or 0.5mm-pitch WLP for yourapplication.
標簽： Considerations Guidelines and Design
上傳時間： 2013-11-09
上傳用戶：ls530720646
This white paper discusses how market trends, the need for increased productivity, and new legislation have accelerated the use of safety systems in industrial machinery. This TÜV-qualified FPGA design methodology is changing the paradigms of safety designs and will greatly reduce development effort, system complexity, and time to market. This allows FPGA users to design their own customized safety controllers and provides a significant competitive advantage over traditional microcontroller or ASIC-based designs. Introduction The basic motivation of deploying functional safety systems is to ensure safe operation as well as safe behavior in cases of failure. Examples of functional safety systems include train brakes, proximity sensors for hazardous areas around machines such as fast-moving robots, and distributed control systems in process automation equipment such as those used in petrochemical plants. The International Electrotechnical Commission’s standard, IEC 61508: “Functional safety of electrical/electronic/programmable electronic safety-related systems,” is understood as the standard for designing safety systems for electrical, electronic, and programmable electronic (E/E/PE) equipment. This standard was developed in the mid-1980s and has been revised several times to cover the technical advances in various industries. In addition, derivative standards have been developed for specific markets and applications that prescribe the particular requirements on functional safety systems in these industry applications. Example applications include process automation (IEC 61511), machine automation (IEC 62061), transportation (railway EN 50128), medical (IEC 62304), automotive (ISO 26262), power generation, distribution, and transportation. 圖Figure 1. Local Safety System
上傳時間： 2013-11-14
上傳用戶：zoudejile
protel 99se 使用技巧以及常見問題解決方法：里面有一些protel 99se 特別技巧，還有我們經常遇到的一些問題！如何使一條走線至兩個不同位置零件的距離相同? 您可先在Design/Rule/High Speed/Matched Net Lengths的規則中來新增規則設定,最后再用Tools/EqualizeNet Lengths 來等長化即可。 Q02、在SCHLIB中造一零件其PIN的屬性，如何決定是Passive, Input, I/O, Hi- Z,Power,…..？在HELP中能找到說明嗎？市面有關 SIM？PLD？的書嗎？或貴公司有講義？ 你可在零件庫自制零件時點選零件Pin腳,并在Electrical Type里,可以自行設定PIN的 屬性,您可參考臺科大的Protel sch 99se 里面有介紹關于SIM的內容。 Q03、請問各位業界前輩,如何能順利讀取pcad8.6版的線路圖,煩請告知 Protel 99SE只能讀取P-CAD 2000的ASCII檔案格式,所以你必須先將P-CAD8.6版的格式轉為P-CAD 2000的檔案格式,才能讓Protel讀取。 Q04、請問我該如何標示線徑大小的那個平方呢 你可以將格點大小設小,還有將字形大小縮小,再放置數字的平方位置即可。 Q05、請問我一次如何更改所有組件的字型 您可以點選其中一個組件字型,再用Global的方法就可以達成你的要求。
上傳時間： 2015-01-01
上傳用戶：yxgi5
Abstract: This reference design explains how to power the Xilinx Zynq Extensible Processing Platform (EPP) and peripheral ICs using
上傳時間： 2013-10-13
上傳用戶：peterli123456
This application note shows how a Xilinx CoolRunnerTM-II CPLD can be used as a simplelogical switch that can quickly and reliably select between different MPEG video sources. Thesource code for the design is available on the Xilinx website, and is linked from the “VHDLCode” section. The code can be expanded by the user to perform additional operations usingthe remaining CPLD resources
標簽： CoolRunner-II Xilinx XAPP CPLD
上傳時間： 2013-12-16
上傳用戶：qwer0574
