Avalanche photo diode (APD) receiver modules arewidely used in fi ber optic communication systems. AnAPD module contains the APD and a signal conditioningamplifi er, but is not completely self contained. It stillrequires signifi cant support circuitry including a highvoltage, low noise power supply and a precision currentmonitor to indicate the signal strength. The challenge issqueezing this support circuitry into applications withlimited board space. The LT®3482 addresses this challengeby integrating a monolithic DC/DC step-up converter andan accurate current monitor. The LT3482 can supportup to a 90V APD bias voltage, and the current monitorprovides better than 10% accuracy over four decades ofdynamic range (250nA to 2.5mA).
The CAT93C46 is a 1 kb Serial EEPROM memory device which isconfigured as either 64 registers of 16 bits (ORG pin at VCC) or 128registers of 8 bits (ORG pin at GND). Each register can be written (orread) serially by using the DI (or DO) pin. The CAT93C46 features aself−timed internal write with auto−clear. On−chip Power−On Resetcircuit protects the internal logic against powering up in the wrongstate.
Bootloader是微處理器上電時運行的第一段代碼，它可以通過通信接口實現對微處理器內部應用程序的更新升級，為網絡化嵌入式產品的應用程序升級帶來極大的便利。由于目前沒有統一嵌入式系統的Bootloader。基于NEC 78K0系列單片機自編程原理，設計出一個適用于78K0/Fx2系列單片機的Bootloader，并能夠通過單片機串口在線升級應用程序。
Abstract:
Bootloader is the first piece of code executed after microprocessor startup. It makes the embedded product’s firmware update conveniently through communication interface. However， no unified bootloader is available for all kinds of microprocessor products. Based on the principle of self-programming NEC 78K0s’ series， a useful Bootloader which is suitable for 78K0/Fx2s’ series MCU is designed，the design can update the application through serial ports.
The CAT28LV64 is a low voltage, low power, CMOS Parallel EEPROM organized as 8K x 8−bits. It requires a simple interface for in−system programming. On−chip address and data latches, self−timed write cycle with auto−clear and VCC power up/down write protection eliminate additional timing and protection hardware. DATA Polling and Toggle status bit signal the start and end of the self−timed write cycle. Additionally, the CAT28LV64 features hardware and software write protection.
The STWD100 watchdog timer circuits are self-contained devices which prevent systemfailures that are caused by certain types of hardware errors (non-responding peripherals,bus contention, etc.) or software errors (bad code jump, code stuck in loop, etc.).The STWD100 watchdog timer has an input, WDI, and an output, WDO (see Figure 2). Theinput is used to clear the internal watchdog timer periodically within the specified timeoutperiod, twd (see Section 3: Watchdog timing). While the system is operating correctly, itperiodically toggles the watchdog input, WDI. If the system fails, the watchdog timer is notreset, a system alert is generated and the watchdog output, WDO, is asserted (seeSection 3: Watchdog timing).The STWD100 circuit also has an enable pin, EN (see Figure 2), which can enable ordisable the watchdog functionality. The EN pin is connected to the internal pull-downresistor. The device is enabled if the EN pin is left floating.
Abstract: The process of designing a radio system can be complex and often involves many project tradeoffs. Witha little insight, balancing these various characteristics can make the job of designing a radio system easier. Thistutorial explores these tradeoffs and provides details to consider for various radio applications. With a focus on theindustrial, scientific, medical (ISM) bands, the subjects of frequency selection, one-way versus two-way systems,modulation techniques, cost, antenna options, power-supply influences, effects on range, and protocol selectionare explored.
Abbrevia is a compression toolkit for Borland Delphi, C++Builder, & Kylix. It supports PKZIP 4, Microsoft CAB, TAR, & gzip formats & the creation of self-extracting archives. It includes visual components that simplify the manipulation of ZIP files.
