Avalanche photo diode (APD) receiver modules arewidely used in fi ber optic communication systems. AnAPD module contains the APD and a signal conditioningamplifi er, but is not completely self contained. It stillrequires signifi cant support circuitry including a highvoltage, low noise power supply and a precision currentmonitor to indicate the signal strength. The challenge issqueezing this support circuitry into applications withlimited board space. The LT®3482 addresses this challengeby integrating a monolithic DC/DC step-up converter andan accurate current monitor. The LT3482 can supportup to a 90V APD bias voltage, and the current monitorprovides better than 10% accuracy over four decades ofdynamic range (250nA to 2.5mA).
上傳時間： 2014-01-18
上傳用戶：wenyuoo
The CAT93C46 is a 1 kb Serial EEPROM memory device which isconfigured as either 64 registers of 16 bits (ORG pin at VCC) or 128registers of 8 bits (ORG pin at GND). Each register can be written (orread) serially by using the DI (or DO) pin. The CAT93C46 features aself−timed internal write with auto−clear. On−chip Power−On Resetcircuit protects the internal logic against powering up in the wrongstate.
上傳時間： 2013-11-20
上傳用戶：ynzfm
Bootloader是微處理器上電時運行的第一段代碼，它可以通過通信接口實現對微處理器內部應用程序的更新升級，為網絡化嵌入式產品的應用程序升級帶來極大的便利。由于目前沒有統一嵌入式系統的Bootloader。基于NEC 78K0系列單片機自編程原理，設計出一個適用于78K0/Fx2系列單片機的Bootloader，并能夠通過單片機串口在線升級應用程序。 Abstract: Bootloader is the first piece of code executed after microprocessor startup. It makes the embedded product’s firmware update conveniently through communication interface. However， no unified bootloader is available for all kinds of microprocessor products. Based on the principle of self-programming NEC 78K0s’ series， a useful Bootloader which is suitable for 78K0/Fx2s’ series MCU is designed，the design can update the application through serial ports.
標簽： Bootloader MCU 自編程
上傳時間： 2013-10-26
上傳用戶：fang2010
The CAT28LV64 is a low voltage, low power, CMOS Parallel EEPROM organized as 8K x 8−bits. It requires a simple interface for in−system programming. On−chip address and data latches, self−timed write cycle with auto−clear and VCC power up/down write protection eliminate additional timing and protection hardware. DATA Polling and Toggle status bit signal the start and end of the self−timed write cycle. Additionally, the CAT28LV64 features hardware and software write protection.
上傳時間： 2013-11-16
上傳用戶：浩子GG
The STWD100 watchdog timer circuits are self-contained devices which prevent systemfailures that are caused by certain types of hardware errors (non-responding peripherals,bus contention, etc.) or software errors (bad code jump, code stuck in loop, etc.).The STWD100 watchdog timer has an input, WDI, and an output, WDO (see Figure 2). Theinput is used to clear the internal watchdog timer periodically within the specified timeoutperiod, twd (see Section 3: Watchdog timing). While the system is operating correctly, itperiodically toggles the watchdog input, WDI. If the system fails, the watchdog timer is notreset, a system alert is generated and the watchdog output, WDO, is asserted (seeSection 3: Watchdog timing).The STWD100 circuit also has an enable pin, EN (see Figure 2), which can enable ordisable the watchdog functionality. The EN pin is connected to the internal pull-downresistor. The device is enabled if the EN pin is left floating.
上傳時間： 2013-10-22
上傳用戶：taiyang250072
Abstract: The process of designing a radio system can be complex and often involves many project tradeoffs. Witha little insight, balancing these various characteristics can make the job of designing a radio system easier. Thistutorial explores these tradeoffs and provides details to consider for various radio applications. With a focus on theindustrial, scientific, medical (ISM) bands, the subjects of frequency selection, one-way versus two-way systems,modulation techniques, cost, antenna options, power-supply influences, effects on range, and protocol selectionare explored.
標簽： 無線
上傳時間： 2013-12-13
上傳用戶：eastgan
PCB 被動組件的隱藏特性解析 傳統上，EMC一直被視為「黑色魔術（black magic）」。其實，EMC是可以藉由數學公式來理解的。不過，縱使有數學分析方法可以利用，但那些數學方程式對實際的EMC電路設計而言，仍然太過復雜了。幸運的是，在大多數的實務工作中，工程師并不需要完全理解那些復雜的數學公式和存在于EMC規范中的學理依據，只要藉由簡單的數學模型，就能夠明白要如何達到EMC的要求。本文藉由簡單的數學公式和電磁理論，來說明在印刷電路板（PCB）上被動組件（passivecomponent）的隱藏行為和特性，這些都是工程師想讓所設計的電子產品通過EMC標準時，事先所必須具備的基本知識。導線和PCB走線導線（wire）、走線（trace）、固定架……等看似不起眼的組件，卻經常成為射頻能量的最佳發射器（亦即，EMI的來源）。每一種組件都具有電感，這包含硅芯片的焊線（bond wire）、以及電阻、電容、電感的接腳。每根導線或走線都包含有隱藏的寄生電容和電感。這些寄生性組件會影響導線的阻抗大小，而且對頻率很敏感。依據LC 的值（決定自共振頻率）和PCB走線的長度，在某組件和PCB走線之間，可以產生自共振（self-resonance），因此，形成一根有效率的輻射天線。在低頻時，導線大致上只具有電阻的特性。但在高頻時，導線就具有電感的特性。因為變成高頻后，會造成阻抗大小的變化，進而改變導線或PCB 走線與接地之間的EMC 設計，這時必需使用接地面（ground plane）和接地網格（ground grid）。導線和PCB 走線的最主要差別只在于，導線是圓形的，走線是長方形的。導線或走線的阻抗包含電阻R和感抗XL = 2πfL，在高頻時，此阻抗定義為Z = R + j XL j2πfL，沒有容抗Xc = 1/2πfC存在。頻率高于100 kHz以上時，感抗大于電阻，此時導線或走線不再是低電阻的連接線，而是電感。一般而言，在音頻以上工作的導線或走線應該視為電感，不能再看成電阻，而且可以是射頻天線。
上傳時間： 2013-11-16
上傳用戶：極客
國外游戲開發者雜志2003年第二期配套代碼，包含了Jon Blow的交互工具的版本更新，使用了一個Kohonen Self-Organizing Feature Map來區分系統的行為
上傳時間： 2014-01-19
上傳用戶：拔絲土豆
Abbrevia is a compression toolkit for Borland Delphi, C++Builder, & Kylix. It supports PKZIP 4, Microsoft CAB, TAR, & gzip formats & the creation of self-extracting archives. It includes visual components that simplify the manipulation of ZIP files.
標簽： compression Abbrevia supports Borland
上傳時間： 2014-01-13
上傳用戶：來茴
摘 : 通過使用 peer-to-peer(P2P)計算模式在 Internet 物理拓撲基礎上建立一個稱為 P2P 覆蓋網絡(P overlay network)的虛擬拓撲結構,有效地建立起一個基于 Internet 的完全分布式自組織網絡路由模型 集中式自組織網絡路由模型(hierarchical aggregation self-organizing network,簡稱 HASN).分別描述了 HASN 由模型的構建目標和體系結構,并詳細分析了 HASN 采用的基于 P2P 計算模式的分布式命名 路由發現和更 算法 HASN_Scale,并在仿真實驗的基礎上,對 HASN 路由模型的性能進行了驗證.
標簽： peer-to-peer P2P Internet overlay
上傳時間： 2014-01-21
上傳用戶：zhenyushaw
