Altera公司SoC FPGA產(chǎn)品簡介高級信息摘要(英文資料) 圖 硬件處理系統(tǒng)
標(biāo)簽: Altera FPGA SoC 產(chǎn)品簡介
上傳時(shí)間: 2013-10-16
上傳用戶:離殤
Prakash Rashinkar has over 15 years experience in system design and verificationof embedded systems for communication satellites, launch vehicles and spacecraftground systems, high-performance computing, switching, multimedia, and wirelessapplications. Prakash graduated with an MSEE from Regional Engineering College,Warangal, in India. He lead the team that was responsible for delivering themethodologies for SOC verification at Cadence Design Systems. Prakash is anactive member of the VSIA Functional Verification DWG. He is currently Architectin the Vertical Markets and Design Environments Group at Cadence.
上傳時(shí)間: 2013-11-19
上傳用戶:m62383408
交通燈控制器實(shí)驗(yàn)報(bào)告--- SOC課程設(shè)計(jì) 一.實(shí)驗(yàn)功能 該交通燈控制器,能完成以下功能: ⒈ 顯示交通燈的紅、黃、綠的指示狀態(tài) 用L1、L2、L3作為綠、黃、紅燈; ⒉ 能實(shí)現(xiàn)正常的倒計(jì)時(shí)功能: 用M2、M1作為南北方向的倒計(jì)時(shí)顯示器,顯示時(shí)間為紅燈55秒,綠燈30秒,黃燈15秒。 ⒊ 能實(shí)現(xiàn)特殊狀態(tài)的功能 (1) 按S1后,能實(shí)現(xiàn)特殊狀態(tài)功能; (2) 顯示器M2M1閃爍; (3) 計(jì)數(shù)器停止計(jì)數(shù)并保持在原來的狀態(tài); (4) 顯示紅燈狀態(tài); (5) 特殊狀態(tài)解除后能繼續(xù)計(jì)數(shù); ⒋ 能實(shí)現(xiàn)總體清零功能 按S2后,系統(tǒng)實(shí)現(xiàn)總清零,計(jì)數(shù)器由初始狀態(tài)計(jì)數(shù),對應(yīng)狀態(tài)的指示燈亮。
標(biāo)簽: SOC 交通燈控制器 實(shí)驗(yàn)報(bào)告 實(shí)驗(yàn)
上傳時(shí)間: 2013-12-21
上傳用戶:leehom61
SoC Design Flow and Tools
標(biāo)簽: Design Tools Flow SoC
上傳時(shí)間: 2014-11-05
上傳用戶:gundan
C8051F單片機(jī)是完全集成的混合信號系統(tǒng)級芯片(SoC),具有與8051兼容的高速CIP-51內(nèi)核,與MCS-51指令集完全兼容,片內(nèi)集成了數(shù)據(jù)采集和控制系統(tǒng)中常用的模擬、數(shù)字外設(shè)及其他功能部件;內(nèi)置FLASH程序存儲器、內(nèi)部RAM,大部分器件內(nèi)部還有位于外部數(shù)據(jù)存儲器空間的RAM,即XRAM。C8051F單片機(jī)具有片內(nèi)調(diào)試電路,通過4腳的JTAG接口可以進(jìn)行非侵入式、全速的在系統(tǒng)調(diào)試。
標(biāo)簽: C8051F SoC 單片機(jī) 集成
上傳時(shí)間: 2014-06-14
上傳用戶:wmwai1314
The GRLIB IP Library is an integrated set of reusable IP cores, designed for system-on-chip (SOC) development. The IP cores are centered around the common on-chip bus, and use a coherent method for simulation and synthesis. The library is vendor independent, with support for different CAD tools and target technologies. A unique plug&play method is used to configure and connect the IP cores without the need to modify any global resources.
標(biāo)簽: system-on-chip integrated designed reusable
上傳時(shí)間: 2013-12-20
上傳用戶:小眼睛LSL
中興集成電路(ZTEIC)最新開發(fā)的用于安全領(lǐng)域的專用SoC系列芯片介紹。
上傳時(shí)間: 2013-12-29
上傳用戶:x4587
在SoC單片機(jī)上實(shí)現(xiàn)對內(nèi)部Flash的操作,基于uc/os-II.
上傳時(shí)間: 2013-12-29
上傳用戶:sk5201314
SOC驗(yàn)證的程序 有用 說明不多自己看吧
上傳時(shí)間: 2015-05-31
上傳用戶:Divine
wishbone總線協(xié)議詳細(xì)的技術(shù)說明文擋!
上傳時(shí)間: 2015-06-07
上傳用戶:thinode
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