This a really intresting and challenging game of Airstrike cool stu
標簽： challenging intresting Airstrike really
上傳時間： 2015-07-25
上傳用戶：kbnswdifs
the samples of VHDL very usef
上傳時間： 2015-07-25
上傳用戶：moerwang
Designing the mode mini manual provided the software design of 23 kinds of typical models mode, the in aid of procedure member was better to develop procedure.
標簽： the mode Designing provided
上傳時間： 2014-01-19
上傳用戶：bruce5996
Part1 of CPRM association document, CPRM is used in copyright protection, which is necessary in SD system
標簽： CPRM association protection copyright
上傳時間： 2014-12-21
上傳用戶：zsjzc
Part2 of CPRM data document, CPRM is for copyright protection in SD system
標簽： CPRM protection copyright document
上傳時間： 2015-07-26
上傳用戶：zmy123
Part3 of CPRM data document, CPRM is for copyright protection in SD system
標簽： CPRM protection copyright document
上傳時間： 2015-07-26
上傳用戶：aappkkee
Part4 of CPRM data document, CPRM is for copyright protection in SD system
標簽： CPRM protection copyright document
上傳時間： 2015-07-26
上傳用戶：671145514
The Linux kernel is one of the most interesting yet least understood open-source projects. It is also a basis for developing new kernel code. That is why Sams is excited to bring you the latest Linux kernel development information from a Novell insider in the second edition of Linux Kernel Development. This authoritative, practical guide will help you better understand the Linux kernel through updated coverage of all the major subsystems, new features associated with Linux 2.6 kernel and insider information on not-yet-released developments. You ll be able to take an in-depth look at Linux kernel from both a theoretical and an applied perspective as you cover a wide range of topics, including algorithms, system call interface, paging strategies and kernel synchronization. Get the top information right from the source in Linux Kernel Development.
標簽： interesting open-source understood projects
上傳時間： 2015-07-26
上傳用戶：mpquest
關于FPGA流水線設計的論文 This work investigates the use of very deep pipelines for implementing circuits in FPGAs, where each pipeline stage is limited to a single FPGA logic element (LE). The architecture and VHDL design of a parameterized integer array multiplier is presented and also an IEEE 754 compliant 32-bit floating-point multiplier. We show how to write VHDL cells that implement such approach, and how the array multiplier architecture was adapted. Synthesis and simulation were performed for Altera Apex20KE devices, although the VHDL code should be portable to other devices. For this family, a 16 bit integer multiplier achieves a frequency of 266MHz, while the floating point unit reaches 235MHz, performing 235 MFLOPS in an FPGA. Additional cells are inserted to synchronize data, what imposes significant area penalties. This and other considerations to apply the technique in real designs are also addressed.
標簽： investigates implementing pipelines circuits
上傳時間： 2015-07-26
上傳用戶：CHINA526
this the 2nd edition of the book "Programming the Microsoft Windows driver model.2nd" (c)2002
標簽： the Programming Microsoft edition
上傳時間： 2015-07-26
上傳用戶：784533221
