關(guān)于FPGA流水線設(shè)計(jì)的論文 This work investigates the use of very deep pipelines for implementing circuits in FPGAs, where each pipeline stage is limited to a single FPGA logic element (LE). The architecture and VHDL design of a parameterized integer array multiplier is presented and also an IEEE 754 compliant 32-bit floating-point multiplier. We show how to write VHDL cells that implement such approach, and how the array multiplier architecture was adapted. Synthesis and simulation were performed for Altera Apex20KE devices, although the VHDL code should be portable to other devices. For this family, a 16 bit integer multiplier achieves a frequency of 266MHz, while the floating point unit reaches 235MHz, performing 235 MFLOPS in an FPGA. Additional cells are inserted to synchronize data, what imposes significant area penalties. This and other considerations to apply the technique in real designs are also addressed.
資源簡(jiǎn)介：關(guān)于FPGA流水線設(shè)計(jì)的論文 This work investigates the use of very deep pipelines for implementing circuits in FPGAs, where each pipeline stage is limited to a single FPGA logic element (LE). The architecture and VHDL design of a parameter...
上傳時(shí)間： 2015-07-26
上傳用戶：CHINA526
資源簡(jiǎn)介：關(guān)于FPGA流水線設(shè)計(jì)的論文\r\nThis work investigates the use of very deep pipelines for\r\nimplementing circuits in FPGAs, where each pipeline\r\nstage is limited to a single FPGA logic element (LE). The\r\narchitecture and VHDL design of a p...
上傳時(shí)間： 2013-09-03
上傳用戶：wl9454
資源簡(jiǎn)介：一些關(guān)于SOPC,NIOS設(shè)計(jì)的論文,可以作畢業(yè)設(shè)計(jì)參考
上傳時(shí)間： 2015-12-19
上傳用戶：363186
資源簡(jiǎn)介：一篇關(guān)于細(xì)紗機(jī)控制設(shè)計(jì)的論文，通過單片機(jī)對(duì)細(xì)紗機(jī)控制。
上傳時(shí)間： 2017-08-31
上傳用戶：曹云鵬
資源簡(jiǎn)介：FSK信號(hào)鑒頻的程序.This program implements the function of finding out the largest and the second largest values of the sequence of "in_buffer[10]"
上傳時(shí)間： 2016-02-05
上傳用戶：youth25
資源簡(jiǎn)介：Addressbook using double-linked list. This example shows the use of a double-linked list by implementing an addressbook for the console. It has features like inserting, searching(linear), sorting(bubble sort), deleting and load/save to a fi...
上傳時(shí)間： 2014-01-24
上傳用戶：asddsd
資源簡(jiǎn)介：隨機(jī)性發(fā)生器、冒泡分類和混洗一組12張牌的演示程序。 Demonstrates the use of a randomizer, bubble-sort and an array to "shuffle" a deck of 12 cards. I put it here for those of you who are trying to figure out how to shuffle with a randomizer...
上傳時(shí)間： 2014-01-16
上傳用戶：zhanditian
資源簡(jiǎn)介：This sample demonstrates the use of the projection objects ProjCoordSys and GeoCoordSys, and the CoordinateSystem property of the MapLayer object and Map control. This application is intended to teach about the different world projectio...
上傳時(shí)間： 2015-05-17
上傳用戶：363186
資源簡(jiǎn)介：This demo nstrates the use of the reversible jump MCMC simulated annealing for neural networks. This algorithm enables us to maximise the joint posterior distribution of the network parameters and the number of basis function. It performs a...
上傳時(shí)間： 2015-07-19
上傳用戶：ma1301115706
資源簡(jiǎn)介：This example demonstrates the use of build-in peripherals on the Philips LPC213x/214x family MCUs. The development environment is ARM s RealView Development Kits for Philips 內(nèi)附README
上傳時(shí)間： 2013-12-24
上傳用戶：924484786
資源簡(jiǎn)介：This paper investigates the design of joint frequency offset and carrier phase estimation of a multi-frequency time division multiple access (MF-TDMA) demodulator that is applied to a digital video broadcasting—return channel system via...
上傳時(shí)間： 2015-12-30
上傳用戶：ls530720646
資源簡(jiǎn)介：TMS320F2812在空間矢量脈寬調(diào)制中的應(yīng)用 基于TMS320F2812的SVPWM的硬件和軟件實(shí)現(xiàn) the use of TMS320F2812 in the SVPWM
上傳時(shí)間： 2013-12-19
上傳用戶：123456wh
資源簡(jiǎn)介：This demo nstrates the use of the reversible jump MCMC algorithm for neural networks. It uses a hierarchical full Bayesian model for neural networks. This model treats the model dimension (number of neurons), model parameters, regularisatio...
上傳時(shí)間： 2014-01-08
上傳用戶：cuibaigao
資源簡(jiǎn)介：This demo shows the use of the PWM block in generating the pulse waveform whose duty cycle is changing regularly. The PWM waveform period is variable, while the width of the pulse remains constant.
上傳時(shí)間： 2014-01-15
上傳用戶：kr770906
資源簡(jiǎn)介：This example demonstrates the use of the ADC block and PWM blocks. The generated DSP code produces the pulse waveform whose duty cycle is changing as the voltage applied to ADC input changes. The waveform period is kept constant.
上傳時(shí)間： 2016-05-17
上傳用戶：sjyy1001
資源簡(jiǎn)介：This project demonstrates the use of secure hash functions technique to implement a file encryption / decryption system. This implemented application can encrypt / decrypt multiple files on the fly using a password. The password supplied...
上傳時(shí)間： 2017-03-08
上傳用戶：xuanchangri
資源簡(jiǎn)介：This project demonstrates the use of secure hash functions technique to implement a file encryption / decryption system. This implemented application can encrypt / decrypt multiple files on the fly using a password. The password supplied...
上傳時(shí)間： 2014-01-10
上傳用戶：yyq123456789
資源簡(jiǎn)介：This report elaborates the use of LPC213x to implement a simple digital audio player, capable of playing music tracks from a removable flash card
上傳時(shí)間： 2014-01-25
上傳用戶：it男一枚
資源簡(jiǎn)介：This project solves the purpose of creating vb6 application using oracle database in back end. It shows how to handle the record with the oracle. my other source codes are at: http://www.developerssourcecode.com Shyam Singh Chandel
上傳時(shí)間： 2013-12-18
上傳用戶：清風(fēng)冷雨
資源簡(jiǎn)介：The goal of this thesis is the development of traffic engineering rules for cellular packet radio networks based on GPRS and EDGE. They are based on traffic models for typical mobile applications. Load generators, representing these traff...
上傳時(shí)間： 2014-01-11
上傳用戶：Miyuki
資源簡(jiǎn)介：這是一本關(guān)于FPGA指導(dǎo)設(shè)計(jì)原則的書，內(nèi)容為中文，文檔形式為PDF
上傳時(shí)間： 2013-08-27
上傳用戶：dudu1210004
資源簡(jiǎn)介：清華大學(xué)關(guān)于robocup球隊(duì)設(shè)計(jì)的畢業(yè)論文,詳細(xì)的闡述了robocup球隊(duì)設(shè)計(jì)的方方面面,實(shí)際說(shuō)明了一些算法的實(shí)現(xiàn)(例如截球,傳球,腳法實(shí)現(xiàn)等等)
上傳時(shí)間： 2015-11-30
上傳用戶：sk5201314
資源簡(jiǎn)介：這是一本關(guān)于FPGA指導(dǎo)設(shè)計(jì)原則的書，內(nèi)容為中文，文檔形式為PDF
上傳時(shí)間： 2016-02-05
上傳用戶：banyou
資源簡(jiǎn)介：一篇是關(guān)于基于UML的圖書管理系統(tǒng)設(shè)計(jì)的論文,另一篇是關(guān)于信息安全的論文
上傳時(shí)間： 2013-12-23
上傳用戶：氣溫達(dá)上千萬(wàn)的
資源簡(jiǎn)介：一篇關(guān)于SCARA機(jī)器人的研究與設(shè)計(jì)的論文，希望對(duì)從事這方面研究的人有用
上傳時(shí)間： 2014-11-22
上傳用戶：eclipse
資源簡(jiǎn)介：一本關(guān)于FPGA詳細(xì)介紹的圖書，很詳細(xì)，很精彩，經(jīng)典
上傳時(shí)間： 2013-08-07
上傳用戶：3294322651
資源簡(jiǎn)介：某外國(guó)大牛寫的關(guān)于FPGA開發(fā)經(jīng)驗(yàn)的書，很不錯(cuò)，推薦
上傳時(shí)間： 2013-08-14
上傳用戶：253189838
資源簡(jiǎn)介：關(guān)于FPGA軟件無(wú)線電的知識(shí)，對(duì)于想接觸用FPGA來(lái)實(shí)現(xiàn)通信算法的朋友很有幫助。
上傳時(shí)間： 2013-08-16
上傳用戶：hgy9473
資源簡(jiǎn)介：FPGA電路設(shè)計(jì)的絕佳參考書,對(duì)電子行業(yè)人員有幫助
上傳時(shí)間： 2013-08-17
上傳用戶：firstbyte
資源簡(jiǎn)介：幾篇關(guān)于FPGA做視頻項(xiàng)目論文,希望對(duì)大家有幫助
上傳時(shí)間： 2013-08-22
上傳用戶：squershop
