Memtest86 is thorough, stand alone memory test for Intel/AMD x86 architecture systems. BIOS based memory tests are only a quick check and often miss failures that are detected by Memtest86.
標(biāo)簽： architecture thorough Memtest systems
上傳時(shí)間： 2014-11-30
上傳用戶(hù)：hn891122
This is simple sample program to test a File System integrity
標(biāo)簽： integrity program System simple
上傳時(shí)間： 2015-06-19
上傳用戶(hù)：gaojiao1999
motorola 1.4" CSTN LCD test program. Drive IC: SSD17
標(biāo)簽： motorola program Drive CSTN
上傳時(shí)間： 2015-06-23
上傳用戶(hù)：ryb
This just a test src.
上傳時(shí)間： 2014-02-28
上傳用戶(hù)：wangdean1101
這篇文章主要介紹ARM JTAG調(diào)試的基本原理。基本的內(nèi)容包括了TAP (TEST ACCESS PORT) 和BOUNDARY-SCAN ARCHITECTURE的介紹，在此基礎(chǔ)上，結(jié)合ARM7TDMI詳細(xì)介紹了的JTAG調(diào)試原理。
標(biāo)簽： BOUNDARY-SCAN ARCHITECTURE ACCESS JTAG
上傳時(shí)間： 2014-12-20
上傳用戶(hù)：上善若水
Creating JButtons.And test it
標(biāo)簽： Creating JButtons test And
上傳時(shí)間： 2015-07-03
上傳用戶(hù)：宋桃子
The firmware test code for s3c2440
標(biāo)簽： firmware s3c2440 code test
上傳時(shí)間： 2015-07-03
上傳用戶(hù)：jqy_china
- XCS for Dynamic Environments + Continuous versions of XCS + Test problem: real multiplexer + Experiments: XCS is explored in dynamic environments with different magnitudes of change to the underlying concepts. +Reference papers: H.H. Dam, H.A. Abbass, C.J. Lokan, Evolutionary Online Data Mining – an Investigation in a Dynamic Environment. 2005, accepted for a book chapter in Springer Series on Studies in Computational Intelligence H.H. Dam, H.A. Abbass, C.J. Lokan, Be Real! XCS with Continuous-Valued Inputs. IWLCS 2005, (International Workshop on Learning Classifier Systems). Washington DC, June 2005.
標(biāo)簽： Environments multiplexer Continuous XCS
上傳時(shí)間： 2015-07-04
上傳用戶(hù)：Avoid98
AVL Tree implementation: I also included a test function to compare the AVL Tree performance with STL Set and Map. Compile the source mavltree.cpp and run it to see the result!
標(biāo)簽： Tree implementation performance AVL
上傳時(shí)間： 2013-12-19
上傳用戶(hù)：3到15
文章主要介紹ARM JTAG調(diào)試的基本原理。基本的內(nèi)容包括了TAP (TEST ACCESS PORT) 和BOUNDARY-SCAN ARCHITECTURE的介紹，在此基礎(chǔ)上，結(jié)合ARM7TDMI詳細(xì)介紹了的JTAG調(diào)試原理。
標(biāo)簽： BOUNDARY-SCAN ARCHITECTURE ACCESS JTAG
上傳時(shí)間： 2014-10-26
上傳用戶(hù)：yxgi5
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