The new demoboard set for the NE/SE564 provides the capabilityfor demonstrating three different
上傳時間： 2013-04-24
上傳用戶：long14578
偏移正交相移鍵控(OQPSK：Offset Quadrature Phase Shift Keying)調制技術是一種恒包絡調制技術，具有頻譜利用率高、頻譜特性好等特點，廣泛應用于衛星通信和移動通信領域。 論文以某型偵收設備中OQPSK解調器的全數字化為研究背景，設計并實現了基于FPGA的全數字OQPSK調制解調器，其中調制器主要用于仿真未知信號，作為測試信號源。論文研究了全數字OQPSK調制解調的基本算法，包括成形濾波器、NCO模型、載波恢復、定時恢復等；完成了整個調制解調算法的MATLAB仿真。在此基礎上，采用VHDL硬件描述語言在Xilinx公司ISE7.1開發環境下設計并實現了各個算法模塊，并在硬件平臺上加以實現。通過實際現場測試，實現了對所偵收信號的正確解調。論文還實現了解調器的百兆以太網接口，使得系統可以方便地將解調數據發送給計算機進行后續處理。
上傳時間： 2013-05-19
上傳用戶：zl123！@#
光纖水聽器自問世以來，在巨大的軍事價值和民用價值推動下得到了迅速發展，已逐漸從實驗室研究階段走向工程應用。同時隨著光纖水聽器的不斷發展，對水聲信號的檢測技術以及數字處理能力也提出了新的要求。論文在此背景下開展了一系列研究工作，并提出了利用FPGA(Field ProgrammableGate Array，現場可編程門陣列)實現光纖3×3耦合器解調算法的新思路。 目前干涉型光纖水聽器的解調一般采用PGC(Phase Generated Carrier，相位生成載波技術)技術和基于3×3光纖耦合器干涉的解調技術。PGC技術在解調過程中引入了載波信號，它對采樣率，激光器等的要求都較高，因此我們把目光投向3×3耦合器解調技術，文中對其解調原理進行了闡述，對采樣率的確定進行了討論，并對3×3耦合器三路輸出不對稱的情況進行了分析，最后在本文的結論部分提出了基于3×3耦合器解調的改良方案。 目前，光纖信號數字化解調的硬件實現采用DSP(Digital Signal Process，可編程數字信號處理器)信號處理機，與之相比，FPGA解調具有速度快、資源占用少、易于擴展等優勢。本文對FPGA與DSP、ASIC(application-specificintegrated circuit，專用集成電路)實現方案進行了對比，分析了適合利用FPGA實現的算法所應具備的特征；介紹了3×3耦合器解調算法中各個模塊的設計情況；分析了系統的工作情況，硬件的構造及芯片的選擇，最后驗證了利用FPGA可以實現3×3耦合器解調算法。
上傳時間： 2013-07-03
上傳用戶：love1314
The MAX2870 ultra-wideband phase-locked loop (PLL) and voltagecontrol oscillator (VCO) can operate in both integer-N and fractional-Nmodes, similar to the Analog Devices ADF4350 wideband synthesizer.This application note compares the MAX2870 and ADF4350 registers andloop filter design in detail. Users who already familiar with ADF4350 canuse this application note as a quick design reference.
上傳時間： 2014-12-23
上傳用戶：變形金剛
Abstract: Many industrial/scientific/medical (ISM) band radio frequency (RF) products use crystal oscillators to generate areference for the phase-locked loop (PLL)-based local oscillator (LO). This tutorial provides a basic description of theISM-RF Crystal Calculator, which can be used to calculate various impacts on crystal frequency accuracy and startupmargin for such an LO.
上傳時間： 2013-11-15
上傳用戶：JasonC
This paper presents a space vector modulation(SVM)-based switching strategy for a three-level neutral point clamped (NPC) converter that is adapted as a STATCOM.
上傳時間： 2013-10-20
上傳用戶：zyt
Many applications require a clock signal to be synchronous, phase-locked, or derived fromanother signal, such as a data signal or another clock. This type of clock circuit is important in
上傳時間： 2014-12-23
上傳用戶：qq21508895
Abstract: Transimpedance amplifiers (TIAs) are widely used to translate the current output of sensors like photodiode-to-voltagesignals, since several circuits and instruments can only accept voltage input. An operational amplifier with a feedback resistor fromoutput to the inverting input is the most straightforward implementation of such a TIA. However, even this simple TIA circuit requirescareful trade-offs among noise gain, offset voltage, bandwidth, and stability. Clearly stability in a TIA is essential for good, reliableperformance. This application note explains the empirical calculations for assessing stability and then shows how to fine-tune theselection of the feedback phase-compensation capacitor.
標簽： Transimpedance Stabilize Amplifier Your
上傳時間： 2013-11-13
上傳用戶：daoyue
A fully differential amplifi er is often used to converta single-ended signal to a differential signal, a designwhich requires three signifi cant considerations: theimpedance of the single-ended source must match thesingle-ended impedance of the differential amplifi er,the amplifi er’s inputs must remain within the commonmode voltage limits and the input signal must be levelshifted to a signal that is centered at the desired outputcommon mode voltage.
上傳時間： 2013-11-09
上傳用戶：wweqas
The STM32F10xxx microcontroller family embeds up to three advanced 12-bit ADCs (depending on the device) with a conversion time down to 1 μs. A self-calibration feature is provided to enhance ADC accuracy versus environmental condition changes.
上傳時間： 2014-12-23
上傳用戶：eastimage
