Design techniques for electronic systems areconstantly changing. In industries at the heart of thedigital revolution, this change is especially acute.Functional integration, dramatic increases incomplexity, new standards and protocols, costconstraints, and increased time-to-market pressureshave bolstered both the design challenges and theopportunities to develop modern electronic systems.One trend driving these changes is the increasedintegration of core logic with previously discretefunctions to achieve higher performance and morecompact board designs.
標(biāo)簽： System Xilinx FPGA 151
上傳時(shí)間： 2014-12-28
上傳用戶：康郎
A Computer-On-Module, or COM, is a Module with all components necessary for a bootable host computer, packaged as a super component. A COM requires a Carrier Board to bring out I/O and to power up. COMs are used to build single board computer solutions and offer OEMs fast time-to-market with reduced development cost. Like integrated circuits, they provide OEMs with significant freedom in meeting form-fit-function requirements. For all these reasons the COM methodology has gained much popularity with OEMs in the embedded industry. COM Express® is an open industry standard for Computer-On-Modules. It is designed to be future proof and to provide a smooth transition path from legacy parallel interfaces to LVDS (Low Voltage Differential Signaling) interfaces. These include the PCI bus and parallel ATA on the one hand and PCI Express and Serial ATA on the other hand.
上傳時(shí)間： 2013-11-05
上傳用戶：Wwill
This white paper discusses how market trends, the need for increased productivity, and new legislation have accelerated the use of safety systems in industrial machinery. This TÜV-qualified FPGA design methodology is changing the paradigms of safety designs and will greatly reduce development effort, system complexity, and time to market. This allows FPGA users to design their own customized safety controllers and provides a significant competitive advantage over traditional microcontroller or ASIC-based designs. Introduction The basic motivation of deploying functional safety systems is to ensure safe operation as well as safe behavior in cases of failure. Examples of functional safety systems include train brakes, proximity sensors for hazardous areas around machines such as fast-moving robots, and distributed control systems in process automation equipment such as those used in petrochemical plants. The International Electrotechnical Commission’s standard, IEC 61508: “Functional safety of electrical/electronic/programmable electronic safety-related systems,” is understood as the standard for designing safety systems for electrical, electronic, and programmable electronic (E/E/PE) equipment. This standard was developed in the mid-1980s and has been revised several times to cover the technical advances in various industries. In addition, derivative standards have been developed for specific markets and applications that prescribe the particular requirements on functional safety systems in these industry applications. Example applications include process automation (IEC 61511), machine automation (IEC 62061), transportation (railway EN 50128), medical (IEC 62304), automotive (ISO 26262), power generation, distribution, and transportation. 圖Figure 1. Local Safety System
標(biāo)簽： FPGA 安全系統(tǒng)
上傳時(shí)間： 2013-11-14
上傳用戶：zoudejile
Design techniques for electronic systems areconstantly changing. In industries at the heart of thedigital revolution, this change is especially acute.Functional integration, dramatic increases incomplexity, new standards and protocols, costconstraints, and increased time-to-market pressureshave bolstered both the design challenges and theopportunities to develop modern electronic systems.One trend driving these changes is the increasedintegration of core logic with previously discretefunctions to achieve higher performance and morecompact board designs.
標(biāo)簽： System Xilinx FPGA 151
上傳時(shí)間： 2013-11-23
上傳用戶：kangqiaoyibie
The AN10 begins with a survey of methods for measuring op amp settling time. This commentary develops into circuits for measuring settling time to 0.0005%. Construction details and results are presented. Appended sections cover oscilloscope overload limitations and amplifier frequency compensation.
標(biāo)簽： 運(yùn)算放大器 穩(wěn)定時(shí)間 測(cè)量
上傳時(shí)間： 2013-11-14
上傳用戶：JIMMYCB001
TheTool is highy customizable map editor(based on QT) which can be extended via LUA scripts. A first implentation is ready and can be published to the public. The editor is the perfect tool who wants to design some 3d games but don t have time to write
標(biāo)簽： customizable extended TheTool scripts
上傳時(shí)間： 2013-12-12
上傳用戶：lanwei
最新的支持向量機(jī)工具箱，有了它會(huì)很方便 1. Find time to write a proper list of things to do! 2. Documentation. 3. Support Vector Regression. 4. Automated model selection. REFERENCES ========== [1] V.N. Vapnik, "The Nature of Statistical Learning Theory", Springer-Verlag, New York, ISBN 0-387-94559-8, 1995. [2] J. C. Platt, "Fast training of support vector machines using sequential minimal optimization", in Advances in Kernel Methods - Support Vector Learning, (Eds) B. Scholkopf, C. Burges, and A. J. Smola, MIT Press, Cambridge, Massachusetts, chapter 12, pp 185-208, 1999. [3] T. Joachims, "Estimating the Generalization Performance of a SVM Efficiently", LS-8 Report 25, Universitat Dortmund, Fachbereich Informatik, 1999.
上傳時(shí)間： 2013-12-16
上傳用戶：亞亞娟娟123
Overview In this chapter I introduce Borland C++Builder (BCB) and explain what it is about. I also devote considerable time to explaining the purpose of this book and the philosophy behind my approach to technical writing. Technical subjects covered in this chapter include Creating a simple Multimedia RAD program that plays movies, WAV files, and MIDI files. Shutting down the BCB RAD programming tools and writing raw Windows API code instead. Creating components dynamically on the heap at runtime. Setting up event handlers (closures) dynamically at runtime. A brief introduction to using exceptions. This topic is covered in more depth in Chapter 5, "Exceptions." A brief introduction to ANSI strings. This subject is covered in more depth in Chapter 3, "C++Builder and the VCL." Using the online help. Greping through the include and source files that come with the product and with this book.
標(biāo)簽： introduce Overview Borland Builder
上傳時(shí)間： 2014-01-04
上傳用戶：小鵬
Purpose of this White Paper This white paper describes a collection of standards, conventions, and guidelines for writing solid Java code. They are based on sound, proven software engineering principles that lead to code that is easy to understand, to maintain, and to enhance. Furthermore, by following these coding standards your productivity as a Java developer should increase remarkably – Experience shows that by taking the time to write high-quality code right from the start you will have a much easier time modifying it during the development process. Finally, following a common set of coding standards leads to greater consistency, making teams of developers significantly more productive.
標(biāo)簽： conventions collection describes standards
上傳時(shí)間： 2014-02-12
上傳用戶：123啊
一個(gè)簡(jiǎn)單實(shí)用的開源C++消息中間件SAFMQ - [軟件開發(fā)] - [開源 消息中間件 SAFMQ ] 2006-11-23 在很多網(wǎng)絡(luò)應(yīng)用中，尤其那些服務(wù)器有時(shí)不在線的應(yīng)用中，將客戶端的數(shù)據(jù)變更按照產(chǎn)生順序同步到服務(wù)器的操作是比較復(fù)雜的。為了解決這種問題，可以采用消息中間件產(chǎn)品（例如Windows的MSMQ還有IBM的MQ），但是這種產(chǎn)品比較龐大而且花費(fèi)不少，對(duì)于小規(guī)模應(yīng)用而言沒有必要。 SAFMQ（全稱為Store and Forward Message Queue）是一個(gè)簡(jiǎn)單的消息中間件，采用C++編寫，采用Apache授權(quán)機(jī)制。截至2006年11月SAFMQ的的版本為0.5.2，發(fā)布于2006年9月。目前版本具有如下的功能： 1. 提供多隊(duì)列、多優(yōu)先級(jí)的消息轉(zhuǎn)發(fā)服務(wù)。 2. 支持文本、二進(jìn)制的消息類型。 3. 支持轉(zhuǎn)發(fā)功能，即多個(gè)消息中間件之間的消息轉(zhuǎn)發(fā)。 4. 支持事務(wù)操作 5. 支持Java、PHP客戶端 6. 支持SSL加密 7. 支持用戶權(quán)限 8. 支持對(duì)消息的標(biāo)記 9. 支持TTL(Time To Live)時(shí)間戳
上傳時(shí)間： 2013-12-06
上傳用戶：alan-ee
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