Description of TLC1549C, TLC1549I, TLC1549M 10-BIT ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL CONTROL
標簽： 1549 TLC ANALOG-TO-DIGITAL Description
上傳時間： 2017-08-04
上傳用戶：sardinescn
例題iIt s time to wake up! It s time to get out of bed. It s time to get ready.
上傳時間： 2014-01-10
上傳用戶：gtf1207
Summary Many control applications require converting some analog input to a digital format. The ADCINC12 User Module is a general-purpose, 12-bit analog to digital converter (ADC) that does just that. This Application Note is meant to be a simple introduction into its operation. The steps required to define, place, and write software are presented. Examples are developed in both assembly and C.
標簽： applications converting Summary control
上傳時間： 2013-12-01
上傳用戶：WMC_geophy
ANALOG INPUT BANDWIDTH is a measure of the frequencyat which the reconstructed output fundamental drops3 dB below its low frequency value for a full scale input. Thetest is performed with fIN equal to 100 kHz plus integer multiplesof fCLK. The input frequency at which the output is −3dB relative to the low frequency input signal is the full powerbandwidth.APERTURE JITTER is the variation in aperture delay fromsample to sample. Aperture jitter shows up as input noise.APERTURE DELAY See Sampling Delay.BOTTOM OFFSET is the difference between the input voltagethat just causes the output code to transition to the firstcode and the negative reference voltage. Bottom Offset isdefined as EOB = VZT–VRB, where VZT is the first code transitioninput voltage and VRB is the lower reference voltage.Note that this is different from the normal Zero Scale Error.CONVERSION LATENCY See PIPELINE DELAY.CONVERSION TIME is the time required for a completemeasurement by an analog-to-digital converter. Since theConversion Time does not include acquisition time, multiplexerset up time, or other elements of a complete conversioncycle, the conversion time may be less than theThroughput Time.DC COMMON-MODE ERROR is a specification which appliesto ADCs with differential inputs. It is the change in theoutput code that occurs when the analog voltages on the twoinputs are changed by an equal amount. It is usually expressed in LSBs.
標簽： Converter Defi ADC 轉(zhuǎn)換器
上傳時間： 2013-11-12
上傳用戶：pans0ul
詳細介紹了TLC1549系列模數(shù)轉(zhuǎn)換器的特點及工作原理，然后根據(jù)TLC1549的工作時序和A/D轉(zhuǎn)換原理針對實際問題編寫了詳細的匯編語言程序。 Abstract: A basic principle and characteristic of TLC1549 analog-to-digital converter are introduced? detailedly in this article.Through engineering-oriented illustration,a microcomputer programmer base on basic principle and time sequence of TLC1549 is writted.
上傳時間： 2014-07-16
上傳用戶：blans
Virtex-5, Spartan-DSP FPGAs Application Note This application note demonstrates how efficient implementations of Digital Up Converters(DUC) and Digital Down Converters (DDC) can be done by leveraging the Xilinx DSP IPportfolio for increased productivity and reduced time to development. Step-by-step instruction is given on how to perform system-level trade off analysis and develop the most efficient FPGA implementation, thus allowing engineers a flexible, low-cost and low-power alternative to ASSP technologies.
標簽： Spartan-DSP Virtex FPGAs Ap
上傳時間： 2013-10-23
上傳用戶：raron1989
Easy-to-Use, Ultra-Tiny, Differential, 16-Bit Delta Sigma ADC With I2C Interface The LTC2453 is an ultra-tiny, fully differential, 16-bit, analog-to-digital converter. The LTC2453 uses a single 2.7V to 5.5V supply and communicates through an I2C interface. The ADC is available in an 8-pin, 3mm x 2mm DFN package. It includes an integrated oscillator that does not require any external components. It uses a delta-sigma modulator as a converter core and has no latency for multiplexed applications. The LTC2453 includes a proprietary input sampling scheme that reduces the average input sampling current several orders of magnitude lower than conventional delta-sigma converters. Additionally, due to its architecture, there is negligible current leakage between the input pins.
標簽： Differential Easy-to-Use Ultra-Tiny Interface
上傳時間： 2014-01-08
上傳用戶：鳳臨西北
With the successful implementation of XML Schema, developers are learning how to increase productivity, improve software reliability, minimize development time, and decrease time to market. This in-depth reference is an all-in-one resource designed to help developers leverage the power and potential of XML schemas by offering a complete roadmap to their creation, design, and use.
標簽： implementation successful developers productivi
上傳時間： 2013-12-08
上傳用戶：gxrui1991
upsd_flash.c These functions are provided to help you develop your initial code. They are optimized for speed rather that size. As a result, you will see very few nested function calls. If speed is not critical, you can use function calls for common tasks (like dat polling after writing a byte to Flash) The penalty is the extra processor time to make the nested calls.
標簽： upsd_flash functions are provided
上傳時間： 2013-12-23
上傳用戶：Andy123456
a screen handling program to provide a flashing message. You will have to design a screen layout for where messages are placed on the screen. You will also have to consider when to delay the program in order to give the user time to read the messages. That is, the program will use the curses library, signals and the sleep function.
標簽： screen handling flashing program
上傳時間： 2016-05-04
上傳用戶：chongcongying
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