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Two-Phase

  • 基于C8051F系列單片機的無線收發(fā)電路設(shè)計

    基于幅移鍵控技術(shù)ASK(Amplitude-Shift Keying),以C8051F340單片機作為監(jiān)測終端控制器,C8051F330D單片機作為探測節(jié)點控制器,采用半雙工的通信方式,通過監(jiān)控終端和探測節(jié)點的無線收發(fā)電路,實現(xiàn)數(shù)據(jù)的雙向無線傳輸。收發(fā)電路采用直徑為0.8 mm的漆包線自行繞制成圓形空心線圈天線,天線直徑為(3.4±0.3)cm。試驗表明,探測節(jié)點與監(jiān)測終端的通信距離為24 cm,通過橋接方式,節(jié)點收發(fā)功率為102 mW時,節(jié)點間的通信距離可達20 cm。與傳統(tǒng)無線收發(fā)模塊相比,該無線收發(fā)電路在受體積、功耗、成本限制的場合有廣闊的應(yīng)用前景。 Abstract:  Based on ASK technology and with the C8051F340 and C8051F330D MCU as the controller, using half-duplex communication mode, this paper achieves bi-directional data transfer. Transceiver circuit constituted by enameled wire which diameter is 0.8mm and wound into a diameter (3.4±0.3) cm circular hollow coil antenna. Tests show that the communication distance between detection and monitoring of the terminal is 24cm,the distance is up to 20cm between two nodes when using the manner of bridging and the node transceiver power is 102mW. Compared with the conventional wireless transceiver modules, the circuit has wide application prospect in small size, low cost and low power consumption and other characteristics.

    標簽: C8051F 單片機 無線收發(fā) 電路設(shè)計

    上傳時間: 2013-10-19

    上傳用戶:xz85592677

  • PCF8578 LCD圖形點陣液晶驅(qū)動器芯片簡介及封裝庫

    The PCF8578 is a low power CMOS1 LCD row and column driver, designed to drive dotmatrix graphic displays at multiplex rates of 1:8, 1:16, 1:24 or 1:32. The device has40 outputs, of which 24 are programmable and configurable for the following ratios ofrows/columns: 32¤8, 24¤16, 16¤24 or 8¤32. The PCF8578 can function as a stand-alone LCDcontroller and driver for use in small systems. For larger systems it can be used inconjunction with up to 32 PCF8579s for which it has been optimized. Together these twodevices form a general purpose LCD dot matrix driver chip set, capable of driving displaysof up to 40960 dots. The PCF8578 is compatible with most microcontrollers andcommunicates via a two-line bidirectional bus (I2C-bus). Communication overhead isminimized by a display RAM with auto-incremented addressing and display bankswitching.

    標簽: 8578 PCF LCD 圖形點陣

    上傳時間: 2013-10-23

    上傳用戶:頂?shù)弥?/p>

  • AD9859芯片資料

    FEATURES400 MSPS internal clock speedIntegrated 10-bit DAC32-bit tuning wordPhase noise ≤ –120 dBc/Hz @ 1 kHz offset (DAC output)Excellent dynamic performance>75 dB SFDR @ 160 MHz (±100 kHz offset) AOUTSerial I/O control1.8 V power supplySoftware and hardware controlled power-down48-lead TQFP/EP packageSupport for 5 V input levels on most digital inputsPLL REFCLK multiplier (4× to 20×)Internal oscillator; can be driven by a single crystalPhase modulation capabilityMultichip synchronization

    標簽: 9859 AD 芯片資料

    上傳時間: 2014-12-04

    上傳用戶:axin881314

  • lpc2478完全使用手冊

    NXP Semiconductor designed the LPC2400 microcontrollers around a 16-bit/32-bitARM7TDMI-S CPU core with real-time debug interfaces that include both JTAG andembedded Trace. The LPC2400 microcontrollers have 512 kB of on-chip high-speedFlash memory. This Flash memory includes a special 128-bit wide memory interface andaccelerator architecture that enables the CPU to execute sequential instructions fromFlash memory at the maximum 72 MHz system clock rate. This feature is available onlyon the LPC2000 ARM Microcontroller family of products. The LPC2400 can execute both32-bit ARM and 16-bit Thumb instructions. Support for the two Instruction Sets meansEngineers can choose to optimize their application for either performance or code size atthe sub-routine level. When the core executes instructions in Thumb state it can reducecode size by more than 30 % with only a small loss in performance while executinginstructions in ARM state maximizes core performance.

    標簽: 2478 lpc 使用手冊

    上傳時間: 2013-11-15

    上傳用戶:zouxinwang

  • PCA9674 PCA9674A—帶中斷的8位Fm+ I2C

    The PCA9674/74A provide general purpose remote I/O expansion for most microcontroller families via the two-line bidirectional bus (I2C-bus) and is a part of the Fast-mode Plus (Fm+) family.

    標簽: 9674 PCA 9674A I2C

    上傳時間: 2013-10-28

    上傳用戶:linyao

  • A Single-Chip Pulsoximeter Des

    This application report discusses the design of non-invasive optical plethysmographyalso called as pulsoximeter using the MSP430FG437 Microcontroller (MCU). Thepulsoximeter consists of a peripheral probe combined with the MCU displaying theoxygen saturation and pulse rate on a LCD glass. The same sensor is used for bothheart-rate detection and pulsoximetering in this application. The probe is placed on aperipheral point of the body such as a finger tip, ear lobe or the nose. The probeincludes two light emitting diodes (LEDs), one in the visible red spectrum (660nm) andthe other in the infrared spectrum (940nm). The percentage of oxygen in the body isworked by measuring the intensity from each frequency of light after it transmitsthrough the body and then calculating the ratio between these two intensities.

    標簽: Pulsoximeter Single-Chip Des

    上傳時間: 2013-10-27

    上傳用戶:黑漆漆

  • DTMF Decoding with a PIC16xxx

    This application note describes how to decode standard DTMF tones using the minimum number of external discrete components and a PIC. The two examples use a PIC which has an 8 bit timer and either a comparator or an ADC, although it can be modified for use on a PIC which has only digital I/O. The Appendices have example code for the 16C662 (with comparator) and 16F877 (using the ADC). As the majority of the Digital Signal Processing is done in software, little is required in the way of external signal conditioning. Software techniques are used to model the individual elements of a DTMF Decoder IC.

    標簽: Decoding DTMF with PIC

    上傳時間: 2013-11-21

    上傳用戶:zhaoke2005

  • PCA9517 Level translating I2C-

    The PCA9517 is a CMOS integrated circuit that provides level shifting between lowvoltage (down to 0.9 V) and higher voltage (2.7 V to 5.5 V) I2C-bus or SMBus applications.While retaining all the operating modes and features of the I2C-bus system during thelevel shifts, it also permits extension of the I2C-bus by providing bidirectional buffering forboth the data (SDA) and the clock (SCL) lines, thus enabling two buses of 400 pF. Usingthe PCA9517 enables the system designer to isolate two halves of a bus for both voltageand capacitance. The SDA and SCL pins are over voltage tolerant and arehigh-impedance when the PCA9517 is unpowered.

    標簽: translating Level 9517 PCA

    上傳時間: 2013-12-25

    上傳用戶:wsf950131

  • PCA9540B 2channel I2C bus mult

    The PCA9540B is a 1-of-2 bidirectional translating multiplexer, controlled via the I2C-bus.The SCL/SDA upstream pair fans out to two SCx/SDx downstream pairs, or channels.Only one SCx/SDx channel is selected at a time, determined by the contents of theprogrammable control register.

    標簽: 2channel 9540B 9540 mult

    上傳時間: 2014-12-28

    上傳用戶:nshark

  • PCA9541 2 to 1 I2C-bus master

    The PCA9541 is a 2-to-1 I2C-bus master selector designed for high reliability dual masterI2C-bus applications where system operation is required, even when one master fails orthe controller card is removed for maintenance. The two masters (for example, primaryand back-up) are located on separate I2C-buses that connect to the same downstreamI2C-bus slave devices. I2C-bus commands are sent by either I2C-bus master and are usedto select one master at a time. Either master at any time can gain control of the slavedevices if the other master is disabled or removed from the system. The failed master isisolated from the system and will not affect communication between the on-line masterand the slave devices on the downstream I2C-bus.

    標簽: master C-bus 9541 PCA

    上傳時間: 2013-10-09

    上傳用戶:3294322651

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