if exists (select * from dbo.sysobjects Where id = object_id(N'[dbo].[FK_分錄表_憑證表]') and OBJECTPROPERTY(id, N'IsForeignKey') = 1) ALTER TABLE [dbo].[分錄表] DROP CONSTRAINT FK_分錄表_憑證表 GO if exists (select * from dbo.sysobjects Where id = object_id(N'[dbo].[本期匯總賬簿_科目代碼_fk]') and OBJECTPROPERTY(id, N'IsForeignKey') = 1) ALTER TABLE [dbo].[本期匯總賬簿] DROP CONSTRAINT 本期匯總賬簿_科目代碼_fk GO if exists (select * from dbo.sysobjects Where id = object_id(N'[dbo].[本期明細(xì)賬簿_科目代碼_fk]') and OBJECTPROPERTY(id, N'IsForeignKey') = 1) ALTER TABLE [dbo].[本期明細(xì)賬簿] DROP CONSTRAINT 本期明細(xì)賬簿_科目代碼_fk GO if exists (select * from dbo.sysobjects Where id = object_id(N'[dbo].[分錄表_科目代碼_fk]') and OBJECTPROPERTY(id, N'IsForeignKey') = 1) ALTER TABLE [dbo].[分錄表] DROP CONSTRAINT 分錄表_科目代碼_fk GO
標(biāo)簽： 財(cái)務(wù)管理系統(tǒng) 源代碼
上傳時(shí)間： 2013-11-20
上傳用戶：清山綠水
if exists (select * from dbo.sysobjects Where id = object_id(N\'[dbo].[圖書(shū)丟失_圖書(shū)編號(hào)_fk]\') and OBJECTPROPERTY(id, N\'IsForeignKey\') = 1) ALTER TABLE [dbo].[圖書(shū)丟失] DROP CONSTRAINT 圖書(shū)丟失_圖書(shū)編號(hào)_fk GO if exists (select * from dbo.sysobjects Where id = object_id(N\'[dbo].[FK_圖書(shū)罰款_圖書(shū)信息]\') and OBJECTPROPERTY(id, N\'IsForeignKey\') = 1) ALTER TABLE [dbo].[圖書(shū)罰款] DROP CONSTRAINT FK_圖書(shū)罰款_圖書(shū)信息 GO if exists (select * from dbo.sysobjects Where id = object_id(N\'[dbo].[圖書(shū)歸還_圖書(shū)編號(hào)_fk]\') and OBJECTPROPERTY(id, N\'IsForeignKey\') = 1) ALTER TABLE [dbo].[圖書(shū)歸還] DROP CONSTRAINT 圖書(shū)歸還_圖書(shū)編號(hào)_fk GO if exists (select * from dbo.sysobjects Where id = object_id(N\'[dbo].[圖書(shū)借閱_圖書(shū)編號(hào)_fk]\') and OBJECTPROPERTY(id, N\'IsForeignKey\') = 1) ALTER TABLE [dbo].[圖書(shū)借閱] DROP CONSTRAINT 圖書(shū)借閱_圖書(shū)編號(hào)_fk GO if exists (select * from dbo.sysobjects Where id = object_id(N\'[dbo].[FK_圖書(shū)征訂_圖書(shū)信息]\') and OBJECTPROPERTY(id, N\'IsForeignKey\') = 1) ALTER TABLE [dbo].[圖書(shū)征訂] DROP CONSTRAINT FK_圖書(shū)征訂_圖書(shū)信息 GO if exists (select * from dbo.sysobjects Where id = object_id(N\'[dbo].[圖書(shū)注銷_圖書(shū)編號(hào)_fk]\') and OBJECTPROPERTY(id, N\'IsForeignKey\') = 1) ALTER TABLE [dbo].[圖書(shū)注銷] DROP CONSTRAINT 圖書(shū)注銷_圖書(shū)編號(hào)_fk
標(biāo)簽： 圖書(shū)館 管理系統(tǒng) 源代碼
上傳時(shí)間： 2014-05-04
上傳用戶：togetsomething
There has long been a need for portable ultrasoundsystems that have good resolution at affordable costpoints. Portable systems enable healthcare providersto use ultrasound in remote locations such asdisaster zones, developing regions, and battlefields,Where it was not previously practical to do so.
標(biāo)簽： Xilinx 便攜式 超聲系統(tǒng) 器件
上傳時(shí)間： 2015-01-01
上傳用戶：hfnishi
SRAM-based FPGAs are non-volatile devices. Upon powerup, They are required to be programmed from an external source. This procedure allows anyone to easily monitor the bit-stream, and clone the device. The problem then becomes how can you effectively protect your intellectual property from others in an architecture Where the part is externally programmed?
標(biāo)簽： FPGA PLD 數(shù)據(jù)加密
上傳時(shí)間： 2013-10-20
上傳用戶：磊子226
This document provides practical, common guidelines for incorporating PCI Express interconnect layouts onto Printed Circuit Boards (PCB) ranging from 4-layer desktop baseboard designs to 10- layer or more server baseboard designs. Guidelines and constraints in this document are intended for use on both baseboard and add-in card PCB designs. This includes interconnects between PCI Express devices located on the same baseboard (chip-to-chip routing) and interconnects between a PCI Express device located “down” on the baseboard and a device located “up” on an add-in card attached through a connector. This document is intended to cover all major components of the physical interconnect including design guidelines for the PCB traces, vias and AC coupling capacitors, as well as add-in card edge-finger and connector considerations. The intent of the guidelines and examples is to help ensure that good high-speed signal design practices are used and that the timing/jitter and loss/attenuation budgets can also be met from end-to-end across the PCI Express interconnect. However, while general physical guidelines and suggestions are given, they may not necessarily guarantee adequate performance of the interconnect for all layouts and implementations. Therefore, designers should consider modeling and simulation of the interconnect in order to ensure compliance to all applicable specifications. The document is composed of two main sections. The first section provides an overview of general topology and interconnect guidelines. The second section concentrates on physical layout constraints Where bulleted items at the beginning of a topic highlight important constraints, while the narrative that follows offers additional insight.
標(biāo)簽： pci PCB 設(shè)計(jì)規(guī)范
上傳時(shí)間： 2014-01-24
上傳用戶：s363994250
This application note discusses a variety of approaches for interfacing analog signals to 5V powered systems. Synthesizing a "rail-to-rail" op amp and scaling techniques for A/D converters are covered. A voltage-to-frequency converter, applicable Where high resolution is required, is also presented.
標(biāo)簽： 微處理器 系統(tǒng)接口
上傳時(shí)間： 2013-10-12
上傳用戶：181992417
This a Bayesian ICA algorithm for the linear instantaneous mixing model with additive Gaussian noise [1]. The inference problem is solved by ML-II, i.e. the sources are found by integration over the source posterior and the noise covariance and mixing matrix are found by maximization of the marginal likelihood [1]. The sufficient statistics are estimated by either variational mean field theory with the linear response correction or by adaptive TAP mean field theory [2,3]. The mean field equations are solved by a belief propagation method [4] or sequential iteration. The computational complexity is N M^3, Where N is the number of time samples and M the number of sources.
標(biāo)簽： instantaneous algorithm Bayesian Gaussian
上傳時(shí)間： 2013-12-19
上傳用戶：jjj0202
The ICA/BSS algorithms are pure mathematical formulas, powerful, but rather mechanical procedures: There is not very much left for the user to do after the machinery has been optimally implemented. The successful and efficient use of the ICALAB strongly depends on a priori knowledge, common sense and appropriate use of the preprocessing and postprocessing tools. In other words, it is preprocessing of data and postprocessing of models Where expertise is truly ne
標(biāo)簽： mathematical algorithms mechanical procedures
上傳時(shí)間： 2015-03-31
上傳用戶：silenthink
JILRuntime A general purpose, register based virtual machine (VM) that supports object-oriented features, reference counting (auto destruction of data as soon as it is no longer used, no garbage collection), exceptions (handled in C/C++ or virtual machine code) and other debugging features. Objects and functions can be written in virtual machine code, as well as in C or C++, or any other language that can interface to C object code. The VM is written for maximum performance and thus is probably not suitable for embedded systems Where a small memory footprint is required. Possible uses of the VM are in game development, scientific research, or to provide a stand-alone, general purpose programming environment.
標(biāo)簽： object-oriented JILRuntime register supports
上傳時(shí)間： 2013-12-23
上傳用戶：cc1015285075
LIBSVM is an integrated software for support vector classification. LIBSVM provides a simple interface Where users can easily link it with their own programs.
標(biāo)簽： LIBSVM classification integrated software
上傳時(shí)間： 2015-04-04
上傳用戶：alan-ee
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