-
自制51編程器
I have build my own programmer. This device can program the AT89C51 and works with it. So it can easily be adapted to programming other devices by itself.
The Atmel Flash devices are ideal for developing, since they can be reprogrammed easy, often and fast. You need only 1 or 2 devices in low cost plastic case for developing. In contrast you need 10 or more high cost windowed devices if you must develop with EPROM devices (e.g. Phillips 87C751).
標簽：
programmer
program
device
build
上傳時間：
2015-05-11
上傳用戶：sdq_123
-
關于FPGA流水線設計的論文
This work investigates the use of very deep pipelines for
implementing circuits in FPGAs, where each pipeline
stage is limited to a single FPGA logic element (LE). The
architecture and VHDL design of a parameterized integer
array multiplier is presented and also an IEEE 754
compliant 32-bit floating-point multiplier. We show how to
write VHDL cells that implement such approach, and how
the array multiplier architecture was adapted. Synthesis
and simulation were performed for Altera Apex20KE
devices, although the VHDL code should be portable to
other devices. For this family, a 16 bit integer multiplier
achieves a frequency of 266MHz, while the floating point
unit reaches 235MHz, performing 235 MFLOPS in an
FPGA. Additional cells are inserted to synchronize data,
what imposes significant area penalties. This and other
considerations to apply the technique in real designs are
also addressed.
標簽：
investigates
implementing
pipelines
circuits
上傳時間：
2015-07-26
上傳用戶：CHINA526
-
This paper presents several low-latency mixed-timing
FIFO (first-in–first-out) interfaces designs that interface systems
on a chip working at different speeds. The connected systems
can be either synchronous or asynchronous. The designs are then
adapted to work between systems with very long interconnect
delays, by migrating a single-clock solution by Carloni et al.
(1999, 2000, and 2001) (for “latency-insensitive” protocols) to
mixed-timing domains. The new designs can be made arbitrarily
robust with regard to metastability and interface operating speeds.
Initial simulations for both latency and throughput are promising.
標簽：
mixed-timing
low-latency
interfaces
first-out
上傳時間：
2015-10-08
上傳用戶：dapangxie
-
These two classes show an extremely simple example of java.net socket programming. They implement the Unix daytime protocol, an extremely simple protocol that consists entirely of the server sending its current local time and date to the client as an ASCII string. The server, to keep it very simple, does not use multiple threads. This code requires JDK 1.1 or later, but can easily be adapted to JDK 1.0.
標簽：
programming
extremely
implement
classes
上傳時間：
2015-11-16
上傳用戶：jennyzai
-
This application report describes the use of Timer_A3 to decode RC5 and SIRC TV IR remote control signals. The decoder described in this report is interrupt-driven and operates a background function using specific features the Timer_A3. Only a small portion of the MSP430 CPU?s nonreal-time resources is used. Specific hardware bit-latching capabilities of the Timer_A3 module are used for real-time decoding of the IR data signal, independent
and asynchronous to the CPU. CPU activity and power consumption are kept to an absolute minimum level. The Timer_A3 decoder implementation also allows other tasks to occur simultaneously if required. The solutions provided are written specifically for MSP430x11x(1) and MSP430x12x derivatives, but can be adapted to any other MSP430 incorporating Timer_A3.
電視遙控器設計基於MSP430
標簽：
application
describes
Timer_A
control
上傳時間：
2014-01-01
上傳用戶：qq21508895
-
Welcome to the Wrox Press C++ tutorial
"I hope you ll enjoy reading this tutorial with your portable, your work, or your home PC. It s a perfect companion to the Introduction to Visual C++ 6.0 Standard Edition manual and is a proven aid to understanding the C++ language. The material in this tutorial is adapted from my book Beginning Visual C++ 6.0, to provide you with a thorough grounding in pure C++. I ve been careful to address the new standards in C++ laid out by the ANSI and ISO committees and I encourage you to adopt these conventions so that your programs are maintainable for years to come.
標簽：
tutorial
Welcome
reading
portabl
上傳時間：
2016-01-26
上傳用戶：wsf950131
-
Patterns of Enterprise Application Architecture is written in direct response to the stiff challenges that face enterprise application developers. The author, noted object-oriented designer Martin Fowler, noticed that despite changes in technology--from Smalltalk to CORBA to Java to .NET--the same basic design ideas can be adapted and applied to solve common problems. With the help of an expert group of contributors, Martin distills over forty recurring solutions into patterns. The result is an indispensable handbook of solutions that are applicable to any enterprise application platform
標簽：
Architecture
Application
Enterprise
challenge
上傳時間：
2013-12-12
上傳用戶：ywqaxiwang
-
This template file is used to completely describe a system in a generalized
％ state space format useable by the ReBEL inference and estimation system.
％ This file must be copied, renamed and adapted to your specific problem. The
％ interface to each function should NOT BE CHANGED however.
標簽：
generalized
completely
template
describe
上傳時間：
2014-01-10
上傳用戶：hustfanenze
-
The XC226x derivatives are high-performance members of the Infineon XC2000 Family
of full-feature single-chip CMOS microcontrollers. These devices extend the functionality
and performance of the C166 Family in terms of instructions (MAC unit), peripherals, and
speed. They combine high CPU performance (up to 80 million instructions per second)
with extended peripheral functionality and enhanced IO capabilities. Optimized
peripherals can be adapted flexibly to meet the application requirements. These
derivatives utilize clock generation via PLL and internal or external clock sources. Onchip
memory modules include program Flash, program RAM, and data RAM.
標簽：
high-performance
full-feature
derivatives
Infineon
上傳時間：
2016-12-12
上傳用戶：wab1981
-
Mapack可用來做矩陣運算
Mapack is a .NET class library for basic linear algebra computations. It supports the following matrix operations and properties: Multiplication, Addition, Subtraction, Determinant, Norm1, Norm2, Frobenius Norm, Infinity Norm, Rank, Condition, Trace, Cholesky, LU, QR, Single Value decomposition, Least Squares solver, Eigenproblem solver, Equation System solver. The algorithms were adapted from Mapack for COM, Lapack and the Java Matrix Package.
標簽：
Mapack
computations
supports
algebra
上傳時間：
2017-01-26
上傳用戶：tb_6877751
