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This collection of circuits was worked out between June1991 and July of 1994. Most were designed at customerrequest or are derivatives of such efforts. All representsubstantial effort and, as such, are disseminated here forwider study and (hopefully) use.1 The examples areroughly arranged in categories including power conversion,transducer signal conditioning, amplifiers and signalgenerators. As always, reader comment and questionsconcerning variants of the circuits shown may be addresseddirectly to the author.
標簽：
測量
控制
實用電路
分
上傳時間：
2013-11-15
上傳用戶：凌云御清風
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When a system designer specifies a nonisolated dc/dc powermodule, considering the needed input voltage range isequally as important as considering the required performanceattributes and features. Generally, nonisolated moduleshave either a narrow or a wide input voltage range. Narrowinputmodules typically have a nominal input voltage of3.3, 5, or 12 V. For systems that operate from a tightlyregulated input bus—such as those that do not use batterybackup—a narrow-input module is often adequate sincethe input remains fairly stable.Offering greater flexibility, wide-input modules operatewithin a range of 7 to 36 V, which includes the popular12- or 24-V industrial bus. This enables a single module tobe used for generating multiple voltages. These modulesare ideal for industrial controls, HVAC systems, vehicles,medical instrumentation, and other applications that usea loosely regulated distribution bus. In addition, systemspowered by a rectifier/battery charger with lead-acidbattery backup almost always require wide-input modules.System designers who choose power supplies may wantto take a close look at the latest generation of wide-inputdc/dc modules.
標簽：
Wide-input
modules
offer
dc
上傳時間：
2014-12-24
上傳用戶：dragonhaixm
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針對材料試驗機等設備中要求測量或控制材料拉伸或壓縮的位移，一般采用光電軸角編碼器檢測位置信號，輸出正交編碼脈沖信號。若采用其他方法檢測位置信號，必然導致電路設計復雜，可靠性降低。因此，提出一種基于LS7266R1的電子式萬能材料試驗機設計方案。給出了試驗機中的控制器工作原理，LS7266R1與單片機的接口硬件設計，以及主程序軟件流程圖。巧妙地把力量傳感器，位移傳感器等機械運動狀態的壓力或拉力以及位置坐標，變成了電壓信號和電脈沖數字信號，供A/D測量和LS7266R1計數，從而實現了獨立完成材料試驗控制或通過PC機串口命令完成材料試驗控制。
Abstract:
Aiming at the requirement that the displacement of the tension and compression always be tested and controlled in the equipement such as material testing machine. The position signal was tested by photoelectric axial angle coder. Therefore， the paper proposes the design of electronic universal testing machine design based on LS7266R1. If the position signal detected by other methods， will inevitably lead to the circuit design complexity， reliability decreased. The work theory of the controller， the hardware interface design between LS7266R1 and single chip， and the flow chart of main program， are presented in this paper. The signal of the compression or tension power and displacement at working， which tested by power sensor and displacement sensor especially， is changed into electric voltage and electric pulse numerical signals. And these signals can be tested by A/D and counted by LS7266R1. Finally the test of the material properties can be controlled by itself， or controlled by the COM command of PC.
標簽：
7266R
7266
LS
R1
上傳時間：
2013-11-02
上傳用戶：yl1140vista
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FeaturesThe following standard features are provided.• Choice of RTOS scheduling policy1. Pre-emptive:always runs the highest available task. Tasks of identical priorityshare CPU time (fully pre-emptive with round robin time slicing).2. Cooperative:Context switches only occur if a task blocks, or explicitly callstaskYIELD().• Co-routines (light weight tasks that utilise very little RAM).• Message queues• Semaphores [via macros]• Trace visualisation ability (requires more RAM)• Majority of source code common to all supported development tools• Wide range of ports and examples
標簽：
FREERTOS
移植
文檔
上傳時間：
2013-10-13
上傳用戶：13162218709
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<Almost since the introduction of microcontrollers as electronic components there always has been an oscillatorcircuit on the device to make it work. From application point of view only some external components wererequired to make it work. However, to make sure that it will always work required more effort. This report is basedon feedback from the market from customers applying 8-bit mircrocontrollers.>
標簽：
oscillators
X-tal
bit
mic
上傳時間：
2013-11-12
上傳用戶：穿著衣服的大衛
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The MAX3243E device consists of three line drivers, five line receivers, and a dual charge-pump circuit with±15-kV ESD (HBM and IEC61000-4-2, Air-Gap Discharge) and ±8-kV ESD (IEC61000-4-2, Contact Discharge)protection on serial-port connection pins. The device meets the requirements of TIA/EIA-232-F and provides theelectrical interface between an asynchronous communication controller and the serial-port connector. Thiscombination of drivers and receivers matches that needed for the typical serial port used in an IBM PC/AT, orcompatible. The charge pump and four small external capacitors allow operation from a single 3-V to 5.5-Vsupply. In addition, the device includes an always-active noninverting output (ROUT2B), which allowsapplications using the ring indicator to transmit data while the device is powered down. The device operates atdata signaling rates up to 250 kbit/s and a maximum of 30-V/ms driver output slew rate.
標簽：
MULTICHANNEL
5.5
TO
RS
上傳時間：
2013-10-19
上傳用戶：ddddddd
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All inputs of the C16x family have Schmitt-Trigger input characteristics. These Schmitt-Triggers are intended to always provide proper internal low and high levels, even if anundefined voltage level (between TTL-VIL and TTL-VIH) is externally applied to the pin.The hysteresis of these inputs, however, is very small, and can not be properly used in anapplication to suppress signal noise, and to shape slow rising/falling input transitions.Thus, it must be taken care that rising/falling input signals pass the undefined area of theTTL-specification between VIL and VIH with a sufficient rise/fall time, as generally usualand specified for TTL components (e.g. 74LS series: gates 1V/us, clock inputs 20V/us).The effect of the implemented Schmitt-Trigger is that even if the input signal remains inthe undefined area, well defined low/high levels are generated internally. Note that allinput signals are evaluated at specific sample points (depending on the input and theperipheral function connected to it), at that signal transitions are detected if twoconsecutive samples show different levels. Thus, only the current level of an input signalat these sample points is relevant, that means, the necessary rise/fall times of the inputsignal is only dependant on the sample rate, that is the distance in time between twoconsecutive evaluation time points. If an input signal, for instance, is sampled throughsoftware every 10us, it is irrelevant, which input level would be seen between thesamples. Thus, it would be allowable for the signal to take 10us to pass through theundefined area. Due to the sample rate of 10us, it is assured that only one sample canoccur while the signal is within the undefined area, and no incorrect transition will bedetected. For inputs which are connected to a peripheral function, e.g. capture inputs, thesample rate is determined by the clock cycle of the peripheral unit. In the case of theCAPCOM unit this means a sample rate of 400ns @ 20MHz CPU clock. This requiresinput signals to pass through the undefined area within these 400ns in order to avoidmultiple capture events.For input signals, which do not provide the required rise/fall times, external circuitry mustbe used to shape the signal transitions.In the attached diagram, the effect of the sample rate is shown. The numbers 1 to 5 in thediagram represent possible sample points. Waveform a) shows the result if the inputsignal transition time through the undefined TTL-level area is less than the time distancebetween the sample points (sampling at 1, 2, 3, and 4). Waveform b) can be the result ifthe sampling is performed more than once within the undefined area (sampling at 1, 2, 5,3, and 4).Sample points:1. Evaluation of the signal clearly results in a low level2. Either a low or a high level can be sampled here. If low is sampled, no transition willbe detected. If the sample results in a high level, a transition is detected, and anappropriate action (e.g. capture) might take place.3. Evaluation here clearly results in a high level. If the previous sample 2) had alreadydetected a high, there is no change. If the previous sample 2) showed a low, atransition from low to high is detected now.
標簽：
Signal
Input
Fall
Rise
上傳時間：
2013-10-23
上傳用戶：copu
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All inputs of the C16x family have Schmitt-Trigger input characteristics. These Schmitt-Triggers are intended to always provide proper internal low and high levels, even if anundefined voltage level (between TTL-VIL and TTL-VIH) is externally applied to the pin.The hysteresis of these inputs, however, is very small, and can not be properly used in anapplication to suppress signal noise, and to shape slow rising/falling input transitions.Thus, it must be taken care that rising/falling input signals pass the undefined area of theTTL-specification between VIL and VIH with a sufficient rise/fall time, as generally usualand specified for TTL components (e.g. 74LS series: gates 1V/us, clock inputs 20V/us).The effect of the implemented Schmitt-Trigger is that even if the input signal remains inthe undefined area, well defined low/high levels are generated internally. Note that allinput signals are evaluated at specific sample points (depending on the input and theperipheral function connected to it), at that signal transitions are detected if twoconsecutive samples show different levels. Thus, only the current level of an input signalat these sample points is relevant, that means, the necessary rise/fall times of the inputsignal is only dependant on the sample rate, that is the distance in time between twoconsecutive evaluation time points. If an input signal, for instance, is sampled throughsoftware every 10us, it is irrelevant, which input level would be seen between thesamples. Thus, it would be allowable for the signal to take 10us to pass through theundefined area. Due to the sample rate of 10us, it is assured that only one sample canoccur while the signal is within the undefined area, and no incorrect transition will bedetected. For inputs which are connected to a peripheral function, e.g. capture inputs, thesample rate is determined by the clock cycle of the peripheral unit. In the case of theCAPCOM unit this means a sample rate of 400ns @ 20MHz CPU clock. This requiresinput signals to pass through the undefined area within these 400ns in order to avoidmultiple capture events.
標簽：
C16x
微控制器
輸入信號
時序圖
上傳時間：
2014-04-02
上傳用戶：han_zh
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FSM 分兩大類：米里型和摩爾型。
組成要素有輸入(包括復位)，狀態(包括當前狀態的操作)，狀態轉移條件，狀態的輸出條件。
設計FSM 的方法和技巧多種多樣，但是總結起來有兩大類：第一種，將狀態轉移和狀態的操作和判斷等寫到一個模塊(process、block)中。另一種是將狀態轉移單獨寫成一個模塊，將狀態的操作和判斷等寫到另一個模塊中(在Verilog 代碼中，相當于使用兩個“always” block)。其中較好的方式是后者。其原因
如下：
首先FSM 和其他設計一樣，最好使用同步時序方式設計，好處不再累述。而狀態機實現后，狀態轉移是用寄存器實現的，是同步時序部分。狀態的轉移條件的判斷是通過組合邏輯判斷實現的，之所以第二種比第一種編碼方式合理，就在于第二種編碼將同步時序和組合邏輯分別放到不同的程序塊(process，block) 中實現。這樣做的好處不僅僅是便于閱讀、理解、維護，更重要的是利于綜合器優化代碼，利于用戶添加合適的時序約束條件，利于布局布線器實現設計。顯式的 FSM 描述方法可以描述任意的FSM(參考Verilog 第四版)P181 有限狀態機的說明。兩個 always 模塊。其中一個是時序模塊，一個為組合邏輯。時序模塊設計與書上完全一致，表示狀態轉移，可分為同步與異步復位。
標簽：
狀態
上傳時間：
2013-10-23
上傳用戶：yupw24
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1 Communication Protocol (Computer as master)
The communication protocol describes here allows your computer to access 4096 internal registers (W0000-W4095) and 1024 internal relays (B0000-B1023) in the Workstation..
1.1 Request Message Format
Request message is a command message to be sent from the computer to the Workstation. The data structure of request message is shown below. Note that numbers are always in hexadecimal form and converted into ASCII characters. For example, Workstation unit number 14 will appear in the message as character 0(30h) followed by character E(45h); a BCC of 5Ah will appear in the message as character 5(35h) followed by character A(41h).
標簽：
HITECH
電腦
通信協議
上傳時間：
2013-10-28
上傳用戶：cxl274287265
