51單片機(jī)C語(yǔ)言多種點(diǎn)陣屏驅(qū)動(dòng)程序（開(kāi)發(fā)軟件為keil C ---8字點(diǎn)陣屏左移程序，64_16點(diǎn)陣屏驅(qū)動(dòng)程序，上移顯示程序，左移顯示程序）51 monolithic integrated circuit C language many kinds of lattice screen driver (develops the software is keil C ---8 character lattice screen left shift procedure, the 64_16 lattice screen driver, uppers shift the display sequence, the left shift display sequence
標(biāo)簽： keil 點(diǎn)陣屏 51單片機(jī)C語(yǔ)言 開(kāi)發(fā)軟件
上傳時(shí)間： 2014-01-04
上傳用戶：Ants
The AVRcam source files were built using the WinAVR distribution (version 3.3.1 of GCC). I haven t tested other versions of GCC, but they should compile without too much difficulty. * The source files for the AVRcam had the author name and copyright information added back into them after the judging of the project, since it states in the competition rules that the author s name can not be present during their inspection. * The included source files are the ones that were submitted for the entry into the Circuit Cellar contest. I have continued to develop the AVRcam, and have added several new features (such as ignoring objects that aren t larger than a minimum size, removing tracked objects that overlap with each, and some general optimizations). If you are interested in the latest source, email me at john@jrobot.net * For more info about the AVRcam, check out http://www.jrobot.net John Orlando August 20, 2004
標(biāo)簽： distribution version AVRcam source
上傳時(shí)間： 2016-12-30
上傳用戶：GavinNeko
A novel met hod t o p artially compensate sigma2delta shap ed noise is p rop osed. By injecting t he comp en2 sation cur rent int o t he p assive loop f ilte r during t he delay time of t he p hase f requency detect or ( PFD) , a maximum reduction of t he p hase noise by about 16dB can be achieved. Comp a red t o ot he r compensation met hods , t he tech2 nique p rop osed he re is relatively simple and easy t o implement . Key building blocks f or realizing t he noise cancel2 lation , including t he delay va riable PFD and comp ensation cur rent source , a re sp ecially designed. Bot h t he behavior level and circuit level simulation results a re p resented.
標(biāo)簽： sigma2delta compensate injecting artially
上傳時(shí)間： 2013-12-18
上傳用戶：qlpqlq
Design of Integrated Circuits for Optical Communications deals with the design of high-speed integrated circuits for optical communication systems. Written for both students and practicing engineers, the book systematically takes the reader from basic concepts to advanced topics, establishing both rigor and intuition. The text emphasizes analysis and design in modern VLSI technologies, particularly CMOS, and presents numerous broadband circuit techniques. Leading researcher Behzad Razavi is also the author of Design of Analog CMOS Integrated Circuits.
標(biāo)簽： Communications Integrated high-speed Circuits
上傳時(shí)間： 2013-12-21
上傳用戶：zhouchang199
The ElectricTM VLSI Design System is an open-source Electronic Design Automation (EDA) system that can handle many forms of circuit design, including: * Custom IC layout * Schematic Capture (digital and analog) * Textual Languages such as VHDL and Verilog
標(biāo)簽： Design open-source ElectricTM Automation
上傳時(shí)間： 2013-12-18
上傳用戶：daguda
VHDL是由美國(guó)國(guó)防部為描述電子電路所開(kāi)發(fā)的一種語(yǔ)言，其全稱為(Very High Speed Integrated Circuit) Hardware Description Language。 與另外一門硬件描述語(yǔ)言Verilog HDL相比，VHDL更善于描述高層的一些設(shè)計(jì)，包括系統(tǒng)級(jí)（算法、數(shù)據(jù)通路、控制）和行為級(jí)（寄存器傳輸級(jí)），而且VHDL具有設(shè)計(jì)重用、大型設(shè)計(jì)能力、可讀性強(qiáng)、易于編譯等優(yōu)點(diǎn)逐漸受到硬件設(shè)計(jì)者的青睞。但是，VHDL是一門語(yǔ)法相當(dāng)嚴(yán)格的語(yǔ)言，易學(xué)性差，特別是對(duì)于剛開(kāi)始接觸VHDL的設(shè)計(jì)者而言，經(jīng)常會(huì)因某些小細(xì)節(jié)處理不當(dāng)導(dǎo)致綜合無(wú)法通過(guò)。為此本文就其中一些比較典型的問(wèn)題展開(kāi)探討，希望對(duì)初學(xué)者有所幫助，提高學(xué)習(xí)進(jìn)度。
標(biāo)簽： VHDL 美國(guó) 電子電路 語(yǔ)言
上傳時(shí)間： 2017-02-18
上傳用戶：nanshan
The Synthetic PIC Verion 1.1 This a VHDL synthesizable model of a simple PIC 16C5x microcontroller. It is not, and is not intended as, a high fidelity circuit simulation. This package includes the following files. Note that the license agreement is stated in the main VHDL file, PICCPU.VHD and common questions are answered in the file SYNTHPIC.TXT Files: README.TXT This file.. SYNTHPIC.TXT Questions and Answers PICCPU.VHD Main processor VHDL file PICALU.VHD ALU for the PICCPU PICREGS.VHD Data memory PICROM.VHD Program memory (created by HEX2VHDL utility) PICTEST.VHD Simple test bench I used to do testing (optional) PICTEST.CMD My Viewlogic ViewSim command file (again, optional) TEST1.ASM First program I assembled and ran on it. TEST2.ASM Another test program.. TEST3.ASM Yet another.. TEST4.ASM Yet another.. TEST5.ASM Yet another.. TEST6.ASM Yet another.. HEX2VHDL.CPP Utility for converting
標(biāo)簽： synthesizable microcontro Synthetic PIC
上傳時(shí)間： 2013-12-22
上傳用戶：妄想演繹師
Many CAD users dismiss schematic capture as a necessary evil in the process of creating PCB layout but we have always disputed this point of view. With PCB layout now offering automation of both component placement and track routing, getting the design into the computer can often be the most time consuming element of the exercise. And if you use circuit simulation to develop your ideas, you are going to spend even more time working on the schematic.
標(biāo)簽： schematic necessary creating dismiss
上傳時(shí)間： 2014-01-25
上傳用戶：WMC_geophy
Very low cost, low component count charger/adapter – replaces linear transformer based solutions • Extremely simple circuit configuration designed for high volume, low cost manufacturing
標(biāo)簽： transformer low component solutions
上傳時(shí)間： 2017-03-27
上傳用戶：2404
Very low cost, low component count charger/adapter – replaces linear transformer based solutions • Extremely simple circuit configuration designed for high volume, low cost manufacturing
標(biāo)簽： transformer low component solutions
上傳時(shí)間： 2017-03-27
上傳用戶：lps11188
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