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carrier-phase

  • carrier-phase synchronization can be approached in a general manner by estimating the multiplicativ

    carrier-phase synchronization can be approached in a general manner by estimating the multiplicative distortion (MD) to which a baseband received signal in an RF or coherent optical transmission system is subjected. This paper presents a unified modeling and estimation of the MD in finite-alphabet digital communication systems. A simple form of MD is the camer phase exp GO) which has to be estimated and compensated for in a coherent receiver. A more general case with fading must, however, allow for amplitude as well as phase variations of the MD. We assume a state-variable model for the MD and generally obtain a nonlinear estimation problem with additional randomly-varying system parameters such as received signal power, frequency offset, and Doppler spread. An extended Kalman filter is then applied as a near-optimal solution to the adaptive MD and channel parameter estimation problem. Examples are given to show the use and some advantages of this scheme.

    標(biāo)簽: synchronization carrier-phase multiplicativ approached

    上傳時(shí)間: 2013-11-28

    上傳用戶:windwolf2000

  • This paper investigates the design of joint frequency offset and carrier phase estimation of a mult

    This paper investigates the design of joint frequency offset and carrier phase estimation of a multi-frequency time division multiple access (MF-TDMA) demodulator that is applied to a digital video broadcasting—return channel system via satellite (DVB-RCS). The proposed joint estimation algorithm is based on the interpolation technique for two correlation values in the frequency and phase domains. This simple interpolation technique can significantly improve frequency and phase resolution capabilities of the proposed technique without increasing the number of the correlation values. In addition, the overall block diagram of a digital communications receiver for DVB-RCS is presented, which was designed using the proposed estimation algorithms. Index Terms—Carrier phase estimation, DVB-RCS, frequency offset estimation, interpolation, joint estimation, MF-TDMA.

    標(biāo)簽: investigates estimation frequency carrier

    上傳時(shí)間: 2015-12-30

    上傳用戶:ls530720646

  • Combined Processing of GPS, GLONASS, and SBAS Code Phase and Carrier Phase Measurements Lamb

    Combined Processing of GPS, GLONASS, and SBAS Code Phase and Carrier Phase Measurements Lambert Wanninger, Stephan Wallstab-Freitag Geodetic Institute, Dresden University of Technology, Germany

    標(biāo)簽: Phase Measurements Processing and

    上傳時(shí)間: 2014-01-15

    上傳用戶:asasasas

  • 基于級(jí)聯(lián)多電平逆變器的STATCOM研究

    本文提出用級(jí)聯(lián)多電平逆變器取代變壓器多重化結(jié)構(gòu)的STATCOM 拓?fù)浣Y(jié)構(gòu),用載波相移正弦脈寬調(diào)制技術(shù)(Carrier phase-shifted SPWM,以下簡(jiǎn)稱CPS-SPWM)取代工頻調(diào)制。這種基于CPS-SPWM 級(jí)聯(lián)多電平逆變器的STATCOM 不僅去掉了多重化變壓器,而且用較低的開關(guān)頻率可以獲得較高的等效開關(guān)頻率的輸出效果,簡(jiǎn)化了濾波;針對(duì)電力系統(tǒng)強(qiáng)耦合、非線性的特征,本文提出了將自抗擾控制應(yīng)用于STATCOM 裝置的控制策略,此控制策略不但可以大大縮短動(dòng)態(tài)過程,改善系統(tǒng)的動(dòng)態(tài)性能,而且具有較強(qiáng)的魯棒性。

    標(biāo)簽: STATCOM 級(jí)聯(lián) 電平逆變器

    上傳時(shí)間: 2013-11-20

    上傳用戶:maqianfeng

  • We address the problem of blind carrier frequency-offset (CFO) estimation in quadrature amplitude mo

    We address the problem of blind carrier frequency-offset (CFO) estimation in quadrature amplitude modulation, phase-shift keying, and pulse amplitude modulation communications systems.We study the performance of a standard CFO estimate, which consists of first raising the received signal to the Mth power, where M is an integer depending on the type and size of the symbol constellation, and then applying the nonlinear least squares (NLLS) estimation approach. At low signal-to noise ratio (SNR), the NLLS method fails to provide an accurate CFO estimate because of the presence of outliers. In this letter, we derive an approximate closed-form expression for the outlier probability. This enables us to predict the mean-square error (MSE) on CFO estimation for all SNR values. For a given SNR, the new results also give insight into the minimum number of samples required in the CFO estimation procedure, in order to ensure that the MSE on estimation is not significantly affected by the outliers.

    標(biāo)簽: frequency-offset estimation quadrature amplitude

    上傳時(shí)間: 2014-01-22

    上傳用戶:牛布牛

  • 干涉型光纖水聽器信號(hào)解調(diào)方法研究

    光纖水聽器自問世以來,在巨大的軍事價(jià)值和民用價(jià)值推動(dòng)下得到了迅速發(fā)展,已逐漸從實(shí)驗(yàn)室研究階段走向工程應(yīng)用。同時(shí)隨著光纖水聽器的不斷發(fā)展,對(duì)水聲信號(hào)的檢測(cè)技術(shù)以及數(shù)字處理能力也提出了新的要求。論文在此背景下開展了一系列研究工作,并提出了利用FPGA(Field ProgrammableGate Array,現(xiàn)場(chǎng)可編程門陣列)實(shí)現(xiàn)光纖3×3耦合器解調(diào)算法的新思路。 目前干涉型光纖水聽器的解調(diào)一般采用PGC(Phase Generated Carrier,相位生成載波技術(shù))技術(shù)和基于3×3光纖耦合器干涉的解調(diào)技術(shù)。PGC技術(shù)在解調(diào)過程中引入了載波信號(hào),它對(duì)采樣率,激光器等的要求都較高,因此我們把目光投向3×3耦合器解調(diào)技術(shù),文中對(duì)其解調(diào)原理進(jìn)行了闡述,對(duì)采樣率的確定進(jìn)行了討論,并對(duì)3×3耦合器三路輸出不對(duì)稱的情況進(jìn)行了分析,最后在本文的結(jié)論部分提出了基于3×3耦合器解調(diào)的改良方案。 目前,光纖信號(hào)數(shù)字化解調(diào)的硬件實(shí)現(xiàn)采用DSP(Digital Signal Process,可編程數(shù)字信號(hào)處理器)信號(hào)處理機(jī),與之相比,F(xiàn)PGA解調(diào)具有速度快、資源占用少、易于擴(kuò)展等優(yōu)勢(shì)。本文對(duì)FPGA與DSP、ASIC(application-specificintegrated circuit,專用集成電路)實(shí)現(xiàn)方案進(jìn)行了對(duì)比,分析了適合利用FPGA實(shí)現(xiàn)的算法所應(yīng)具備的特征;介紹了3×3耦合器解調(diào)算法中各個(gè)模塊的設(shè)計(jì)情況;分析了系統(tǒng)的工作情況,硬件的構(gòu)造及芯片的選擇,最后驗(yàn)證了利用FPGA可以實(shí)現(xiàn)3×3耦合器解調(diào)算法。

    標(biāo)簽: 干涉型 光纖水聽器 信號(hào)解調(diào) 方法研究

    上傳時(shí)間: 2013-07-03

    上傳用戶:love1314

  • Phase-Locked Loop Circuit Design

    ·Phase-Locked Loop Circuit Design

    標(biāo)簽: nbsp Phase-Locked Circuit Design

    上傳時(shí)間: 2013-04-24

    上傳用戶:lhc9102

  • Phase-Locked Loops for Wireless Communications (英).pdf

    資料->【E】光盤論文->【E5】英文書籍->Phase-Locked Loops for Wireless Communications (英).pdf

    標(biāo)簽: Communications Phase-Locked Wireless Loops

    上傳時(shí)間: 2013-07-27

    上傳用戶:大融融rr

  • 相敏檢波電路鑒相特性的仿真研究

    分析了調(diào)幅信號(hào)和載波信號(hào)之間的相位差與調(diào)制信號(hào)的極性的對(duì)應(yīng)關(guān)系,得出了相敏檢波電路輸出電壓的極性與調(diào)制信號(hào)的極性有對(duì)應(yīng)關(guān)系的結(jié)論。為了驗(yàn)證相敏檢波電路的這一特性,給出3 個(gè)電路方案,分別選用理想元件和實(shí)際元件,采用Multisim 對(duì)其進(jìn)行仿真實(shí)驗(yàn),直觀形象地演示了相敏檢波電路的鑒相特性,是傳統(tǒng)的實(shí)際操作實(shí)驗(yàn)所不可比擬的。關(guān)鍵詞:相敏檢波;鑒相特性;Multisim;電路仿真 Abstract : The corresponding relation between modulation signal polarity and difference phases of amplitudemodulated signal and the carrier signal ,the polarity of phase2sensitive detecting circuit output voltage and the polarity of modulation signal are correspondent . In order to verify this characteristic ,three elect ric circuit s plans are produced ,idea element s and actual element s are selected respectively. Using Multisim to carry on a simulation experiment ,and then demonst rating the phase detecting characteristic of the phase sensitive circuit vividly and directly. Which is t raditional practical experience cannot be com pared.Keywords :phase sensitive detection ;phase2detecting characteristic ;Multisim;circuit simulation

    標(biāo)簽: 相敏檢波 電路 仿真研究 鑒相

    上傳時(shí)間: 2013-11-23

    上傳用戶:guanhuihong

  • 基于CPLD的QDPSK調(diào)制解調(diào)電路設(shè)計(jì)

    為了在CDMA系統(tǒng)中更好地應(yīng)用QDPSK數(shù)字調(diào)制方式,在分析四相相對(duì)移相(QDPSK)信號(hào)調(diào)制解調(diào)原理的基礎(chǔ)上,設(shè)計(jì)了一種QDPSK調(diào)制解調(diào)電路,它包括串并轉(zhuǎn)換、差分編碼、四相載波產(chǎn)生和選相、相干解調(diào)、差分譯碼和并串轉(zhuǎn)換電路。在MAX+PLUSⅡ軟件平臺(tái)上,進(jìn)行了編譯和波形仿真。綜合后下載到復(fù)雜可編程邏輯器件EPM7128SLC84-15中,測(cè)試結(jié)果表明,調(diào)制電路能正確選相,解調(diào)電路輸出數(shù)據(jù)與QDPSK調(diào)制輸入數(shù)據(jù)完全一致,達(dá)到了預(yù)期的設(shè)計(jì)要求。 Abstract:  In order to realize the better application of digital modulation mode QDPSK in the CDMA system, a sort of QDPSK modulation-demodulation circuit was designed based on the analysis of QDPSK signal modulation-demodulation principles. It included serial/parallel conversion circuit, differential encoding circuit, four-phase carrier wave produced and phase chosen circuit, coherent demodulation circuit, difference decoding circuit and parallel/serial conversion circuit. And it was compiled and simulated on the MAX+PLUSⅡ software platform,and downloaded into the CPLD of EPM7128SLC84-15.The test result shows that the modulation circuit can exactly choose the phase,and the output data of the demodulator circuit is the same as the input data of the QDPSK modulate. The circuit achieves the prospective requirement of the design.

    標(biāo)簽: QDPSK CPLD 調(diào)制解調(diào) 電路設(shè)計(jì)

    上傳時(shí)間: 2014-01-13

    上傳用戶:qoovoop

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