DC connect Instruction Manual
標簽： Instruction connect Manual DC
上傳時間： 2013-11-30
上傳用戶：愛死愛死
TcpIp使用方法 在服務端運行tcp.exe, 在另一臺與之在同一network的客戶端上運行tcplnk.exe, 規定相同的port, 在服務端上begin, 在客戶端上輸入服務器的IP地址，connect, 客戶端上編輯框中的字符便可send到客戶端的編輯框中。
上傳時間： 2013-04-24
上傳用戶：asdfasdfd
在AD PCB 環境下，Design>Rules>Plane> Polygon connect style ,點中Polygon connect style，右鍵點擊new rule ---新建一個規則點擊新建的規則既選中該規則，在name 框中改變里面的內容即可修改該規則的名稱，默認是Polygonconnect_1 ，現我們修改為GND-Via.
上傳時間： 2013-10-29
上傳用戶：yunfan1978
PCI ExpressTM is the third generation of PCI (PeripheralComponent Interconnect) technology used to connect I/Operhipheral devices in computer systems. It is intended asa general purpose I/O device interconnect that meets theneeds of a wide variety of computing platforms such asdesktop, mobile, server and communications. It alsospecifies the electrical and mechanical attributes of thebackplane, connectors and removable cards in thesesystems.
上傳時間： 2013-11-17
上傳用戶：squershop
The MSP-FET430PIF is a Parallel Port interface (does not include target board) that is used to program and debug MSP430 FET tools and test boards through the JTAG interface. This interface is included in our FET tools, but sold without the development board. This interface uses a Parallel PC Port to communicate to the Debugger Software (IAR Kickstart software included) running on the PC. The interface uses the standard 14 pin header to communicate to the MSP430 device using the standard JTAG protocol. The flash memory can be erased and programmed in seconds with only a few keystrokes, and since the MSP430 flash is extremely low power, no external power supply is required. The tool has an integrated software environment and connects directly to the PC which greatly simplifies the set-up and use of the tool. The flash development tool supports development with all MSP430 flash parts. Features MSP430 debugging interface to connect a MSP430-Flash-device to a Parallel port on a PC Supports JTAG debug protocol (NO support for Spy-Bi-Wire (2-wire JTAG) debug protocol, Spy-Bi-Wire (2-wire JTAG) is supported by MSP-FET430UIF) Parallel Port cable and a 14-conductor target cable Full documentation on CD ROM Integrated IAR Kickstart user interface which includes: Assembler Linker Limulator Source-level debugger Limited C-compiler Technical specifications: Backwardly compatable with existing FET tool boards.
上傳時間： 2013-10-26
上傳用戶：fengweihao158@163.com
Atmel AVR 單片機上網方案 The AVR Embedded Internet Toolkit is the fastest way to connect anyembedded design to the Internet. It includes an ATmega AVR microcontroller,dedicated hardware, and all required software protocols forconnecting to the Internet. The AVR Embedded Internet Toolkit is thefastest choice for getting started with embedded Internet and for developinga complete embedded application connected to the Internet.
上傳時間： 2013-11-06
上傳用戶：xjz632
IntroductionAs chip designers pack more functions into ICs,pin counts continue to grow and the space betweenpins keeps shrinking. Pin spacings of 0.5 mm and0.65 mm are not at all uncommon. The power ofthese new ICs is wonderful, to be sure, but trou-bleshooting them can be a chore because connect-ing scopes and logic analyzers has become muchmore difficult and less dependable.
標簽： Agilent Probing Wedge High
上傳時間： 2013-10-22
上傳用戶：蔣清華嗯
The PCA9541 is a 2-to-1 I2C-bus master selector designed for high reliability dual masterI2C-bus applications where system operation is required, even when one master fails orthe controller card is removed for maintenance. The two masters (for example, primaryand back-up) are located on separate I2C-buses that connect to the same downstreamI2C-bus slave devices. I2C-bus commands are sent by either I2C-bus master and are usedto select one master at a time. Either master at any time can gain control of the slavedevices if the other master is disabled or removed from the system. The failed master isisolated from the system and will not affect communication between the on-line masterand the slave devices on the downstream I2C-bus.
上傳時間： 2013-10-09
上傳用戶：3294322651
基于單DSP的VoIP模擬電話適配器研究與實現:提出和實現了一種新穎的基于單個通用數字信號處理器(DSP)的VoIP模擬電話適配器方案。DSP的I/O和存儲資源非常有限，通常適于運算密集型應用，不適宜控制密集型應用[5]。該系統高效利用單DSP的I/O和片內外存儲器資源，采用μC/OS-II嵌入式實時操作系統，支持SIP和TCP-UDP/IP協議，通過LAN或者寬帶接入，使普通電話機成為Internet終端，實現IP電話。該系統軟硬件結構緊湊高效，運行穩定，成本低，具有廣闊的應用前景。關鍵詞：模擬電話適配器；IP電話；數字信號處理器；μC/OS-II 【Abstract】This paper presents a VoIP ATA solution based on a single digital signal processor (DSP). DSPs are suitable for arithmetic-intensiveapplication and unsuitable for control-intensive application because of the limitation of I/O and memory resources. This solution is based on a 16-bitfixed-point DSP and μC/OS-II embedded real-time operating system. It makes good use of the limited resources, supports SIP and TCP-UDP/IPprotocol. It can connect the analog telephone to Internet and realize the VoIP application. This system has a great future for its high efficiency andlow cost.【Key words】Analog telephone adapter (ATA); Voice over Internet protocol (VoIP); Digital signal processor (DSP); μC/OS-II Research and Implementation of VoIPATA Based on Single DSP
上傳時間： 2013-11-20
上傳用戶：Wwill
Abstract: Designers who must interface 1-Wire temperature sensors with Xilinx field-programmable gate arrays(FPGAs) can use this reference design to drive a DS28EA00 1-Wire slave device. The downloadable softwarementioned in this document can also be used as a starting point to connect other 1-Wire slave devices. The systemimplements a 1-Wire master connected to a UART and outputs temperature to a PC from the DS28EA00 temperaturesensor. In addition, high/low alarm outputs are displayed from the DS28EA00 PIO pins using LEDs.
標簽： PicoBlaze Create Master Xilinx
上傳時間： 2013-11-05
上傳用戶：a6697238
