ArkoMaster端系統(tǒng)模塊設(shè)計文檔 系統(tǒng)管理軟件自主開發(fā)軟件。 系統(tǒng)管理軟件A實現(xiàn)最終目標(biāo)：是可以自由橫跨桌面（Desktop）、Client/Server、大型主機的不同層次的管理，管理的對象包括應(yīng)用程序（Applications），數(shù)據(jù)庫(Database)，網(wǎng)絡(luò)(LAN, WAN)，系統(tǒng)平臺(System Platform)和互連網(wǎng)Internet/Intranet等五個方面。
標(biāo)簽： ArkoMaster Desktop Client Server
上傳時間： 2017-06-24
上傳用戶：牛津鞋
StarShip Battle 2004 game The Developing Mobile Phone Applications With J2ME Technology course provides students with hands-on experience with developing mobile applications on the Java 2 Platform, Micro Edition (J2ME platform) using Connected, Limited Device Configuration (CLDC) and the Mobile Interface Device Profile (MIDP). The course provides information about MIDP 1.0 and MIDP 2.0 specifications, concepts, and capabilities.
標(biāo)簽： Applications Developing Technology StarShip
上傳時間： 2014-01-21
上傳用戶：yyyyyyyyyy
MATSNL is a package of MATLAB M-files for computing wireless sensor node lifetime/power budget and solving optimal node architecture choice problems. It is intended as an analysis and simulation tool for researchers and educators that are easy to use and modify. MATSNL is designed to give the rough power/ lifetime predictions based on node and application specifications while giving useful insight on platform design for the large node lifetime by providing side-by-side comparison across various platforms. The MATSNL code and manual can be found at the bottom of this page. A related list of publications describing the models used in MATSNL is posted on the ENALAB part of the 2 project at http://www.eng.yale.edu/enalab/aspire.htm
標(biāo)簽： computing lifetime wireless M-files
上傳時間： 2014-01-01
上傳用戶：lnnn30
Universal.Data.Access.Components 2.50 Universal Data Access Components (UniDAC) is a library of components that provides direct access to most popular database servers from Delphi, Delphi for .NET and, C++Builder. UniDAC can work with such servers as Oracle, Microsoft SQL Server, MySQL, Interbase, Firebird. The UniDAC library is designed to help programmers develop faster and cleaner cross-database applications. UniDAC is a complete replacement for such standard universal technology as dbExpress. UniDAC is a handy in use and efficient data access solution bringing into play many features specific to each server.
標(biāo)簽： Components Universal Access Data
上傳時間： 2017-07-04
上傳用戶：123456wh
這是關(guān)于impulse c語言實現(xiàn)DMA硬件控制器的文檔，實現(xiàn)的平臺是Nios II Platform
上傳時間： 2017-07-06
上傳用戶：zhaiye
MATSNL is a package of MATLAB M-files for computing wireless sensor node lifetime/power budget and solving optimal node architecture choice problems. It is intended as an analysis and simulation tool for researchers and educators that are easy to use and modify. MATSNL is designed to give the rough power/ lifetime predictions based on node and application specifications while giving useful insight on platform design for the large node lifetime by providing side-by-side comparison across various platforms.
標(biāo)簽： computing lifetime wireless M-files
上傳時間： 2017-07-19
上傳用戶：hasan2015
this doc describes/ introduces the ATCA advanced telecom computing group specification manual A new platform rchitecture for lecommunicati quipment eptember 2001
標(biāo)簽： specification introduces describes computing
上傳時間： 2017-07-22
上傳用戶：songnanhua
The FPGA can realize a more optimized Digital controller in DC/DC Converters when compare to DSPs. In this paper, based on the FPGA platform, The theoretical analysis, characteristics, simulation and design consideration are given. The methods to implement the digital DC/DC Converters have been researched. The function module, state machine of digital DC/DC controller and high resolution DPWM with Sigma- Delta dither has been introduced. They are verified by experiments on a 20 W, 300 KHz non-isolated synchronous buck converters.
標(biāo)簽： Converters controller optimized Digital
上傳時間： 2013-12-31
上傳用戶：tzl1975
RS_latch using vhdl, When using static gates as building blocks, the most fundamental latch is the simple SR latch, where S and R stand for set and reset. It can be constructed from a pair of cross-coupled NOR (Not OR) logic gates. The stored bit is present on the output marked Q. Normally, in storage mode, the S and R inputs are both low, and feedback maintains the Q and Q outputs in a constant state, with Q the complement of Q. If S (Set) is pulsed high while R is held low, then the Q output is forced high, and stays high when S returns to low similarly, if R (Reset) is pulsed high while S is held low, then the Q output is forced low, and stays low when R returns to low.
標(biāo)簽： using fundamental the RS_latch
上傳時間： 2017-07-30
上傳用戶：努力努力再努力
wireless tools: used to manipulate the Wireless Extensions. The Wireless Extensions is an interface allowing you to set Wireless LAN specific parameters and get the specific stats. It also contains the IfRename package, used for advance renaming of network interfaces. We have cross compile to arm linux. and fixed some bug (eg:sometime the essid will be rename to a long name, or sometime it will disaply the essid twice)
標(biāo)簽： Extensions Wireless manipulate interface
上傳時間： 2014-11-26
上傳用戶：wlcaption
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