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decoding

解碼是一種用特定方法,把數(shù)碼還原成它所代表的內(nèi)容或?qū)㈦娒}沖信號(hào)、光信號(hào)、無(wú)線電波等轉(zhuǎn)換成它所代表的信息、數(shù)據(jù)等的過(guò)程。解碼是受傳者將接受到的符號(hào)或代碼還原為信息的過(guò)程,與編碼過(guò)程相對(duì)應(yīng)。[1]
  • 基于CPLD的QDPSK調(diào)制解調(diào)電路設(shè)計(jì)

    為了在CDMA系統(tǒng)中更好地應(yīng)用QDPSK數(shù)字調(diào)制方式,在分析四相相對(duì)移相(QDPSK)信號(hào)調(diào)制解調(diào)原理的基礎(chǔ)上,設(shè)計(jì)了一種QDPSK調(diào)制解調(diào)電路,它包括串并轉(zhuǎn)換、差分編碼、四相載波產(chǎn)生和選相、相干解調(diào)、差分譯碼和并串轉(zhuǎn)換電路。在MAX+PLUSⅡ軟件平臺(tái)上,進(jìn)行了編譯和波形仿真。綜合后下載到復(fù)雜可編程邏輯器件EPM7128SLC84-15中,測(cè)試結(jié)果表明,調(diào)制電路能正確選相,解調(diào)電路輸出數(shù)據(jù)與QDPSK調(diào)制輸入數(shù)據(jù)完全一致,達(dá)到了預(yù)期的設(shè)計(jì)要求。 Abstract:  In order to realize the better application of digital modulation mode QDPSK in the CDMA system, a sort of QDPSK modulation-demodulation circuit was designed based on the analysis of QDPSK signal modulation-demodulation principles. It included serial/parallel conversion circuit, differential encoding circuit, four-phase carrier wave produced and phase chosen circuit, coherent demodulation circuit, difference decoding circuit and parallel/serial conversion circuit. And it was compiled and simulated on the MAX+PLUSⅡ software platform,and downloaded into the CPLD of EPM7128SLC84-15.The test result shows that the modulation circuit can exactly choose the phase,and the output data of the demodulator circuit is the same as the input data of the QDPSK modulate. The circuit achieves the prospective requirement of the design.

    標(biāo)簽: QDPSK CPLD 調(diào)制解調(diào) 電路設(shè)計(jì)

    上傳時(shí)間: 2014-01-13

    上傳用戶:qoovoop

  • UHF讀寫器設(shè)計(jì)中的FM0解碼技術(shù)

       針對(duì)UHF讀寫器設(shè)計(jì)中,在符合EPC Gen2標(biāo)準(zhǔn)的情況下,對(duì)標(biāo)簽返回的高速數(shù)據(jù)進(jìn)行正確解碼以達(dá)到正確讀取標(biāo)簽的要求,提出了一種新的在ARM平臺(tái)下采用邊沿捕獲統(tǒng)計(jì)定時(shí)器數(shù)判斷數(shù)據(jù)的方法,并對(duì)FM0編碼進(jìn)行解碼。與傳統(tǒng)的使用定時(shí)器定時(shí)采樣高低電平的FM0解碼方法相比,該解碼方法可以減少定時(shí)器定時(shí)誤差累積的影響;可以將捕獲定時(shí)器數(shù)中斷與數(shù)據(jù)判斷解碼相對(duì)分隔開,使得中斷對(duì)解碼影響很小,實(shí)現(xiàn)捕獲與解碼的同步。通過(guò)實(shí)驗(yàn)表明,這種方法提高了解碼的效率,在160 Kb/s的接收速度下,讀取一張標(biāo)簽的時(shí)間約為30次/s。 Abstract:  Aiming at the requirement of receiving correctly decoded data from the tag under high-speed communication which complied with EPC Gen2 standard in the design of UHF interrogator, the article introduced a new technology for FM0 decoding which counted the timer counter to judge data by using the edge interval of signal capture based on the ARM7 platform. Compared with the traditional FM0 decoding method which used the timer timed to sample the high and low level, the method could reduce the accumulation of timing error and could relatively separate capture timer interrupt and the data judgment for decoding, so that the disruption effect on the decoding was small and realizd synchronization of capture and decoding. Testing result shows that the method improves the efficiency of decoding, at 160 Kb/s receiving speed, the time of the interrogator to read a tag is about 30 times/s.

    標(biāo)簽: UHF FM0 讀寫器 解碼技術(shù)

    上傳時(shí)間: 2013-11-10

    上傳用戶:liufei

  • 基于CPLD的QDPSK調(diào)制解調(diào)電路設(shè)計(jì)

    為了在CDMA系統(tǒng)中更好地應(yīng)用QDPSK數(shù)字調(diào)制方式,在分析四相相對(duì)移相(QDPSK)信號(hào)調(diào)制解調(diào)原理的基礎(chǔ)上,設(shè)計(jì)了一種QDPSK調(diào)制解調(diào)電路,它包括串并轉(zhuǎn)換、差分編碼、四相載波產(chǎn)生和選相、相干解調(diào)、差分譯碼和并串轉(zhuǎn)換電路。在MAX+PLUSⅡ軟件平臺(tái)上,進(jìn)行了編譯和波形仿真。綜合后下載到復(fù)雜可編程邏輯器件EPM7128SLC84-15中,測(cè)試結(jié)果表明,調(diào)制電路能正確選相,解調(diào)電路輸出數(shù)據(jù)與QDPSK調(diào)制輸入數(shù)據(jù)完全一致,達(dá)到了預(yù)期的設(shè)計(jì)要求。 Abstract:  In order to realize the better application of digital modulation mode QDPSK in the CDMA system, a sort of QDPSK modulation-demodulation circuit was designed based on the analysis of QDPSK signal modulation-demodulation principles. It included serial/parallel conversion circuit, differential encoding circuit, four-phase carrier wave produced and phase chosen circuit, coherent demodulation circuit, difference decoding circuit and parallel/serial conversion circuit. And it was compiled and simulated on the MAX+PLUSⅡ software platform,and downloaded into the CPLD of EPM7128SLC84-15.The test result shows that the modulation circuit can exactly choose the phase,and the output data of the demodulator circuit is the same as the input data of the QDPSK modulate. The circuit achieves the prospective requirement of the design.

    標(biāo)簽: QDPSK CPLD 調(diào)制解調(diào) 電路設(shè)計(jì)

    上傳時(shí)間: 2013-10-28

    上傳用戶:jyycc

  • One of the most important issues affecting the implementation of microcontroller software deals wi

    One of the most important issues affecting the implementation of microcontroller software deals with the data-decision algorithm. Data-decision refers to decoding the DIO-pin from the CC400/CC900. Two main principles exist for decoding Manchester-coded data: Data decision based on timing the period between transitions, and data decision based on oversampling.

    標(biāo)簽: microcontroller implementation important affecting

    上傳時(shí)間: 2013-12-18

    上傳用戶:671145514

  • I. Introduction This code exploits a previously undisclosed vulnerability in the bit string deco

    I. Introduction This code exploits a previously undisclosed vulnerability in the bit string decoding code in the Microsoft ASN.1 library. This vulnerability is not related to the bit string vulnerability described in eEye advisory AD20040210-2. Both vulnerabilities were fixed in the MS04-007 patch. II. Screenshots $ ./kill-bill.pl . kill-bill : Microsoft ASN.1 remote exploit for CAN-2003-0818 (MS04-007) by Solar Eclipse <solareclipse@phreedom.org> Usage: kill-bill -p <port> -s <service> host Services: iis IIS HTTP server (port 80) iis-ssl IIS HTTP server with SSL (port 443) exchange Microsoft Exchange SMTP server (port 25) smb-nbt SMB over NetBIOS (port 139) smb SMB (port 445) If a service is running on its default port you don t have to specify both the service and the port. Examples: kill-bill -s iis 192.168.0.1 kill-bill -p 80 192.168.0.1 kill-bill -p 1234 -s smb 192.168.0.1

    標(biāo)簽: I. vulnerability Introduction undisclosed

    上傳時(shí)間: 2015-05-15

    上傳用戶:xhz1993

  • The two C source files in this archive are specific to the TRS-80 Model 4 with high-resolution grap

    The two C source files in this archive are specific to the TRS-80 Model 4 with high-resolution graphics board. However, the code which performs Huffman enco- ding and decoding is of general interest.

    標(biāo)簽: high-resolution specific archive source

    上傳時(shí)間: 2014-11-04

    上傳用戶:二驅(qū)蚊器

  • The two C source files in this archive are specific to the TRS-80 Model 4 with high-resolution grap

    The two C source files in this archive are specific to the TRS-80 Model 4 with high-resolution graphics board. However, the code which performs Huffman enco- ding and decoding is of general interest.

    標(biāo)簽: high-resolution specific archive source

    上傳時(shí)間: 2013-12-18

    上傳用戶:417313137

  • 這是一篇關(guān)于turbo碼的原始論文

    這是一篇關(guān)于turbo碼的原始論文,Near optimum error correcting cod ing and decoding turbo codes,可供學(xué)習(xí)參考之用。

    標(biāo)簽: turbo 論文

    上傳時(shí)間: 2014-01-24

    上傳用戶:pkkkkp

  • turbo code的經(jīng)典論文

    turbo code的經(jīng)典論文,共享給大家 Near Shannon limit error-correcting coding and decoding Turbo-codes

    標(biāo)簽: turbo code 論文

    上傳時(shí)間: 2015-06-20

    上傳用戶:luke5347

  • The intention is to show you how to incorporate the AWGN/Rayleigh fading models in the basic decodin

    The intention is to show you how to incorporate the AWGN/Rayleigh fading models in the basic decoding program.

    標(biāo)簽: incorporate intention the Rayleigh

    上傳時(shí)間: 2014-01-04

    上傳用戶:ANRAN

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